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1a59d1b8e0
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1334 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.113240726@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
72 lines
2 KiB
C
72 lines
2 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) NEC Electronics Corporation 2004-2006
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*
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* This file is based on the arch/mips/ddb5xxx/ddb5477/pci.c
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*
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* Copyright 2001 MontaVista Software Inc.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <asm/bootinfo.h>
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#include <asm/emma/emma2rh.h>
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static struct resource pci_io_resource = {
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.name = "pci IO space",
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.start = EMMA2RH_PCI_IO_BASE,
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.end = EMMA2RH_PCI_IO_BASE + EMMA2RH_PCI_IO_SIZE - 1,
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.flags = IORESOURCE_IO,
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};
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static struct resource pci_mem_resource = {
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.name = "pci memory space",
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.start = EMMA2RH_PCI_MEM_BASE,
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.end = EMMA2RH_PCI_MEM_BASE + EMMA2RH_PCI_MEM_SIZE - 1,
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.flags = IORESOURCE_MEM,
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};
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extern struct pci_ops emma2rh_pci_ops;
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static struct pci_controller emma2rh_pci_controller = {
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.pci_ops = &emma2rh_pci_ops,
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.mem_resource = &pci_mem_resource,
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.io_resource = &pci_io_resource,
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.mem_offset = -0x04000000,
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.io_offset = 0,
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};
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static void __init emma2rh_pci_init(void)
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{
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/* setup PCI interface */
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emma2rh_out32(EMMA2RH_PCI_ARBIT_CTR, 0x70f);
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emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, 0x80000a18);
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emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_COMMAND,
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PCI_STATUS_DEVSEL_MEDIUM | PCI_STATUS_CAP_LIST |
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PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
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emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_BASE_ADDRESS_0, 0x10000000);
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emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_BASE_ADDRESS_1, 0x00000000);
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emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, 0x12000000 | 0x218);
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emma2rh_out32(EMMA2RH_PCI_IWIN1_CTR, 0x18000000 | 0x600);
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emma2rh_out32(EMMA2RH_PCI_INIT_ESWP, 0x00000200);
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emma2rh_out32(EMMA2RH_PCI_TWIN_CTR, 0x00009200);
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emma2rh_out32(EMMA2RH_PCI_TWIN_BADR, 0x00000000);
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emma2rh_out32(EMMA2RH_PCI_TWIN0_DADR, 0x00000000);
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emma2rh_out32(EMMA2RH_PCI_TWIN1_DADR, 0x00000000);
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}
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static int __init emma2rh_pci_setup(void)
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{
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emma2rh_pci_init();
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register_pci_controller(&emma2rh_pci_controller);
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return 0;
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}
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arch_initcall(emma2rh_pci_setup);
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