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![Yinghai Lu](/assets/img/avatar_default.png)
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
681 lines
16 KiB
C
681 lines
16 KiB
C
/* drivers/serial/serial_lh7a40x.c
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*
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* Copyright (C) 2004 Coastal Environmental Systems
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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*/
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/* Driver for Sharp LH7A40X embedded serial ports
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*
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* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
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* Based on drivers/serial/amba.c, by Deep Blue Solutions Ltd.
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*
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* ---
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*
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* This driver supports the embedded UARTs of the Sharp LH7A40X series
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* CPUs. While similar to the 16550 and other UART chips, there is
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* nothing close to register compatibility. Moreover, some of the
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* modem control lines are not available, either in the chip or they
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* are lacking in the board-level implementation.
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*
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* - Use of SIRDIS
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* For simplicity, we disable the IR functions of any UART whenever
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* we enable it.
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*
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*/
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#if defined(CONFIG_SERIAL_LH7A40X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/serial_core.h>
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#include <linux/serial.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#define DEV_MAJOR 204
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#define DEV_MINOR 16
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#define DEV_NR 3
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#define ISR_LOOP_LIMIT 256
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#define UR(p,o) _UR ((p)->membase, o)
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#define _UR(b,o) (*((volatile unsigned int*)(((unsigned char*) b) + (o))))
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#define BIT_CLR(p,o,m) UR(p,o) = UR(p,o) & (~(unsigned int)m)
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#define BIT_SET(p,o,m) UR(p,o) = UR(p,o) | ( (unsigned int)m)
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#define UART_REG_SIZE 32
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#define UART_R_DATA (0x00)
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#define UART_R_FCON (0x04)
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#define UART_R_BRCON (0x08)
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#define UART_R_CON (0x0c)
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#define UART_R_STATUS (0x10)
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#define UART_R_RAWISR (0x14)
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#define UART_R_INTEN (0x18)
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#define UART_R_ISR (0x1c)
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#define UARTEN (0x01) /* UART enable */
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#define SIRDIS (0x02) /* Serial IR disable (UART1 only) */
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#define RxEmpty (0x10)
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#define TxEmpty (0x80)
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#define TxFull (0x20)
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#define nRxRdy RxEmpty
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#define nTxRdy TxFull
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#define TxBusy (0x08)
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#define RxBreak (0x0800)
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#define RxOverrunError (0x0400)
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#define RxParityError (0x0200)
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#define RxFramingError (0x0100)
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#define RxError (RxBreak | RxOverrunError | RxParityError | RxFramingError)
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#define DCD (0x04)
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#define DSR (0x02)
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#define CTS (0x01)
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#define RxInt (0x01)
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#define TxInt (0x02)
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#define ModemInt (0x04)
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#define RxTimeoutInt (0x08)
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#define MSEOI (0x10)
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#define WLEN_8 (0x60)
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#define WLEN_7 (0x40)
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#define WLEN_6 (0x20)
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#define WLEN_5 (0x00)
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#define WLEN (0x60) /* Mask for all word-length bits */
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#define STP2 (0x08)
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#define PEN (0x02) /* Parity Enable */
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#define EPS (0x04) /* Even Parity Set */
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#define FEN (0x10) /* FIFO Enable */
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#define BRK (0x01) /* Send Break */
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struct uart_port_lh7a40x {
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struct uart_port port;
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unsigned int statusPrev; /* Most recently read modem status */
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};
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static void lh7a40xuart_stop_tx (struct uart_port* port)
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{
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BIT_CLR (port, UART_R_INTEN, TxInt);
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}
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static void lh7a40xuart_start_tx (struct uart_port* port)
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{
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BIT_SET (port, UART_R_INTEN, TxInt);
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/* *** FIXME: do I need to check for startup of the
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transmitter? The old driver did, but AMBA
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doesn't . */
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}
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static void lh7a40xuart_stop_rx (struct uart_port* port)
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{
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BIT_SET (port, UART_R_INTEN, RxTimeoutInt | RxInt);
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}
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static void lh7a40xuart_enable_ms (struct uart_port* port)
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{
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BIT_SET (port, UART_R_INTEN, ModemInt);
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}
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static void lh7a40xuart_rx_chars (struct uart_port* port)
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{
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struct tty_struct* tty = port->info->port.tty;
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int cbRxMax = 256; /* (Gross) limit on receive */
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unsigned int data; /* Received data and status */
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unsigned int flag;
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while (!(UR (port, UART_R_STATUS) & nRxRdy) && --cbRxMax) {
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data = UR (port, UART_R_DATA);
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flag = TTY_NORMAL;
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++port->icount.rx;
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if (unlikely(data & RxError)) {
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if (data & RxBreak) {
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data &= ~(RxFramingError | RxParityError);
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++port->icount.brk;
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if (uart_handle_break (port))
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continue;
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}
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else if (data & RxParityError)
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++port->icount.parity;
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else if (data & RxFramingError)
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++port->icount.frame;
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if (data & RxOverrunError)
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++port->icount.overrun;
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/* Mask by termios, leave Rx'd byte */
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data &= port->read_status_mask | 0xff;
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if (data & RxBreak)
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flag = TTY_BREAK;
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else if (data & RxParityError)
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flag = TTY_PARITY;
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else if (data & RxFramingError)
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flag = TTY_FRAME;
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}
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if (uart_handle_sysrq_char (port, (unsigned char) data))
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continue;
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uart_insert_char(port, data, RxOverrunError, data, flag);
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}
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tty_flip_buffer_push (tty);
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return;
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}
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static void lh7a40xuart_tx_chars (struct uart_port* port)
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{
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struct circ_buf* xmit = &port->info->xmit;
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int cbTxMax = port->fifosize;
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if (port->x_char) {
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UR (port, UART_R_DATA) = port->x_char;
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++port->icount.tx;
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port->x_char = 0;
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return;
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}
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if (uart_circ_empty (xmit) || uart_tx_stopped (port)) {
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lh7a40xuart_stop_tx (port);
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return;
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}
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/* Unlike the AMBA UART, the lh7a40x UART does not guarantee
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that at least half of the FIFO is empty. Instead, we check
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status for every character. Using the AMBA method causes
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the transmitter to drop characters. */
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do {
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UR (port, UART_R_DATA) = xmit->buf[xmit->tail];
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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++port->icount.tx;
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if (uart_circ_empty(xmit))
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break;
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} while (!(UR (port, UART_R_STATUS) & nTxRdy)
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&& cbTxMax--);
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if (uart_circ_chars_pending (xmit) < WAKEUP_CHARS)
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uart_write_wakeup (port);
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if (uart_circ_empty (xmit))
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lh7a40xuart_stop_tx (port);
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}
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static void lh7a40xuart_modem_status (struct uart_port* port)
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{
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unsigned int status = UR (port, UART_R_STATUS);
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unsigned int delta
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= status ^ ((struct uart_port_lh7a40x*) port)->statusPrev;
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BIT_SET (port, UART_R_RAWISR, MSEOI); /* Clear modem status intr */
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if (!delta) /* Only happens if we missed 2 transitions */
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return;
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((struct uart_port_lh7a40x*) port)->statusPrev = status;
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if (delta & DCD)
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uart_handle_dcd_change (port, status & DCD);
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if (delta & DSR)
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++port->icount.dsr;
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if (delta & CTS)
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uart_handle_cts_change (port, status & CTS);
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wake_up_interruptible (&port->info->delta_msr_wait);
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}
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static irqreturn_t lh7a40xuart_int (int irq, void* dev_id)
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{
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struct uart_port* port = dev_id;
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unsigned int cLoopLimit = ISR_LOOP_LIMIT;
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unsigned int isr = UR (port, UART_R_ISR);
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do {
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if (isr & (RxInt | RxTimeoutInt))
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lh7a40xuart_rx_chars(port);
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if (isr & ModemInt)
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lh7a40xuart_modem_status (port);
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if (isr & TxInt)
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lh7a40xuart_tx_chars (port);
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if (--cLoopLimit == 0)
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break;
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isr = UR (port, UART_R_ISR);
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} while (isr & (RxInt | TxInt | RxTimeoutInt));
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return IRQ_HANDLED;
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}
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static unsigned int lh7a40xuart_tx_empty (struct uart_port* port)
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{
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return (UR (port, UART_R_STATUS) & TxEmpty) ? TIOCSER_TEMT : 0;
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}
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static unsigned int lh7a40xuart_get_mctrl (struct uart_port* port)
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{
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unsigned int result = 0;
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unsigned int status = UR (port, UART_R_STATUS);
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if (status & DCD)
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result |= TIOCM_CAR;
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if (status & DSR)
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result |= TIOCM_DSR;
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if (status & CTS)
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result |= TIOCM_CTS;
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return result;
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}
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static void lh7a40xuart_set_mctrl (struct uart_port* port, unsigned int mctrl)
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{
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/* None of the ports supports DTR. UART1 supports RTS through GPIO. */
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/* Note, kernel appears to be setting DTR and RTS on console. */
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/* *** FIXME: this deserves more work. There's some work in
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tracing all of the IO pins. */
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#if 0
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if( port->mapbase == UART1_PHYS) {
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gpioRegs_t *gpio = (gpioRegs_t *)IO_ADDRESS(GPIO_PHYS);
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if (mctrl & TIOCM_RTS)
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gpio->pbdr &= ~GPIOB_UART1_RTS;
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else
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gpio->pbdr |= GPIOB_UART1_RTS;
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}
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#endif
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}
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static void lh7a40xuart_break_ctl (struct uart_port* port, int break_state)
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{
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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if (break_state == -1)
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BIT_SET (port, UART_R_FCON, BRK); /* Assert break */
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else
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BIT_CLR (port, UART_R_FCON, BRK); /* Deassert break */
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static int lh7a40xuart_startup (struct uart_port* port)
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{
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int retval;
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retval = request_irq (port->irq, lh7a40xuart_int, 0,
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"serial_lh7a40x", port);
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if (retval)
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return retval;
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/* Initial modem control-line settings */
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((struct uart_port_lh7a40x*) port)->statusPrev
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= UR (port, UART_R_STATUS);
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/* There is presently no configuration option to enable IR.
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Thus, we always disable it. */
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BIT_SET (port, UART_R_CON, UARTEN | SIRDIS);
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BIT_SET (port, UART_R_INTEN, RxTimeoutInt | RxInt);
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return 0;
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}
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static void lh7a40xuart_shutdown (struct uart_port* port)
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{
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free_irq (port->irq, port);
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BIT_CLR (port, UART_R_FCON, BRK | FEN);
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BIT_CLR (port, UART_R_CON, UARTEN);
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}
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static void lh7a40xuart_set_termios (struct uart_port* port,
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struct ktermios* termios,
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struct ktermios* old)
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{
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unsigned int con;
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unsigned int inten;
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unsigned int fcon;
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unsigned long flags;
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unsigned int baud;
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unsigned int quot;
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baud = uart_get_baud_rate (port, termios, old, 8, port->uartclk/16);
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quot = uart_get_divisor (port, baud); /* -1 performed elsewhere */
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switch (termios->c_cflag & CSIZE) {
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case CS5:
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fcon = WLEN_5;
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break;
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case CS6:
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fcon = WLEN_6;
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break;
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case CS7:
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fcon = WLEN_7;
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break;
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case CS8:
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default:
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fcon = WLEN_8;
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break;
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}
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if (termios->c_cflag & CSTOPB)
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fcon |= STP2;
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if (termios->c_cflag & PARENB) {
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fcon |= PEN;
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if (!(termios->c_cflag & PARODD))
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fcon |= EPS;
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}
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if (port->fifosize > 1)
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fcon |= FEN;
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spin_lock_irqsave (&port->lock, flags);
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uart_update_timeout (port, termios->c_cflag, baud);
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port->read_status_mask = RxOverrunError;
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if (termios->c_iflag & INPCK)
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port->read_status_mask |= RxFramingError | RxParityError;
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if (termios->c_iflag & (BRKINT | PARMRK))
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port->read_status_mask |= RxBreak;
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/* Figure mask for status we ignore */
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port->ignore_status_mask = 0;
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if (termios->c_iflag & IGNPAR)
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port->ignore_status_mask |= RxFramingError | RxParityError;
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if (termios->c_iflag & IGNBRK) {
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port->ignore_status_mask |= RxBreak;
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/* Ignore overrun when ignorning parity */
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/* *** FIXME: is this in the right place? */
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if (termios->c_iflag & IGNPAR)
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port->ignore_status_mask |= RxOverrunError;
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}
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/* Ignore all receive errors when receive disabled */
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if ((termios->c_cflag & CREAD) == 0)
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port->ignore_status_mask |= RxError;
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con = UR (port, UART_R_CON);
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inten = (UR (port, UART_R_INTEN) & ~ModemInt);
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if (UART_ENABLE_MS (port, termios->c_cflag))
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inten |= ModemInt;
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BIT_CLR (port, UART_R_CON, UARTEN); /* Disable UART */
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UR (port, UART_R_INTEN) = 0; /* Disable interrupts */
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UR (port, UART_R_BRCON) = quot - 1; /* Set baud rate divisor */
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UR (port, UART_R_FCON) = fcon; /* Set FIFO and frame ctrl */
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UR (port, UART_R_INTEN) = inten; /* Enable interrupts */
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UR (port, UART_R_CON) = con; /* Restore UART mode */
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static const char* lh7a40xuart_type (struct uart_port* port)
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{
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return port->type == PORT_LH7A40X ? "LH7A40X" : NULL;
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}
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static void lh7a40xuart_release_port (struct uart_port* port)
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{
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release_mem_region (port->mapbase, UART_REG_SIZE);
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}
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static int lh7a40xuart_request_port (struct uart_port* port)
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{
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return request_mem_region (port->mapbase, UART_REG_SIZE,
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"serial_lh7a40x") != NULL
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? 0 : -EBUSY;
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}
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static void lh7a40xuart_config_port (struct uart_port* port, int flags)
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{
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if (flags & UART_CONFIG_TYPE) {
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port->type = PORT_LH7A40X;
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lh7a40xuart_request_port (port);
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}
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}
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static int lh7a40xuart_verify_port (struct uart_port* port,
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struct serial_struct* ser)
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{
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int ret = 0;
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if (ser->type != PORT_UNKNOWN && ser->type != PORT_LH7A40X)
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ret = -EINVAL;
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if (ser->irq < 0 || ser->irq >= nr_irqs)
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ret = -EINVAL;
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if (ser->baud_base < 9600) /* *** FIXME: is this true? */
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ret = -EINVAL;
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return ret;
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}
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static struct uart_ops lh7a40x_uart_ops = {
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.tx_empty = lh7a40xuart_tx_empty,
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.set_mctrl = lh7a40xuart_set_mctrl,
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.get_mctrl = lh7a40xuart_get_mctrl,
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.stop_tx = lh7a40xuart_stop_tx,
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.start_tx = lh7a40xuart_start_tx,
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.stop_rx = lh7a40xuart_stop_rx,
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.enable_ms = lh7a40xuart_enable_ms,
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.break_ctl = lh7a40xuart_break_ctl,
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.startup = lh7a40xuart_startup,
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.shutdown = lh7a40xuart_shutdown,
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.set_termios = lh7a40xuart_set_termios,
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.type = lh7a40xuart_type,
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.release_port = lh7a40xuart_release_port,
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.request_port = lh7a40xuart_request_port,
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|
.config_port = lh7a40xuart_config_port,
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|
.verify_port = lh7a40xuart_verify_port,
|
|
};
|
|
|
|
static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
|
|
{
|
|
.port = {
|
|
.membase = (void*) io_p2v (UART1_PHYS),
|
|
.mapbase = UART1_PHYS,
|
|
.iotype = UPIO_MEM,
|
|
.irq = IRQ_UART1INTR,
|
|
.uartclk = 14745600/2,
|
|
.fifosize = 16,
|
|
.ops = &lh7a40x_uart_ops,
|
|
.flags = UPF_BOOT_AUTOCONF,
|
|
.line = 0,
|
|
},
|
|
},
|
|
{
|
|
.port = {
|
|
.membase = (void*) io_p2v (UART2_PHYS),
|
|
.mapbase = UART2_PHYS,
|
|
.iotype = UPIO_MEM,
|
|
.irq = IRQ_UART2INTR,
|
|
.uartclk = 14745600/2,
|
|
.fifosize = 16,
|
|
.ops = &lh7a40x_uart_ops,
|
|
.flags = UPF_BOOT_AUTOCONF,
|
|
.line = 1,
|
|
},
|
|
},
|
|
{
|
|
.port = {
|
|
.membase = (void*) io_p2v (UART3_PHYS),
|
|
.mapbase = UART3_PHYS,
|
|
.iotype = UPIO_MEM,
|
|
.irq = IRQ_UART3INTR,
|
|
.uartclk = 14745600/2,
|
|
.fifosize = 16,
|
|
.ops = &lh7a40x_uart_ops,
|
|
.flags = UPF_BOOT_AUTOCONF,
|
|
.line = 2,
|
|
},
|
|
},
|
|
};
|
|
|
|
#ifndef CONFIG_SERIAL_LH7A40X_CONSOLE
|
|
# define LH7A40X_CONSOLE NULL
|
|
#else
|
|
# define LH7A40X_CONSOLE &lh7a40x_console
|
|
|
|
static void lh7a40xuart_console_putchar(struct uart_port *port, int ch)
|
|
{
|
|
while (UR(port, UART_R_STATUS) & nTxRdy)
|
|
;
|
|
UR(port, UART_R_DATA) = ch;
|
|
}
|
|
|
|
static void lh7a40xuart_console_write (struct console* co,
|
|
const char* s,
|
|
unsigned int count)
|
|
{
|
|
struct uart_port* port = &lh7a40x_ports[co->index].port;
|
|
unsigned int con = UR (port, UART_R_CON);
|
|
unsigned int inten = UR (port, UART_R_INTEN);
|
|
|
|
|
|
UR (port, UART_R_INTEN) = 0; /* Disable all interrupts */
|
|
BIT_SET (port, UART_R_CON, UARTEN | SIRDIS); /* Enable UART */
|
|
|
|
uart_console_write(port, s, count, lh7a40xuart_console_putchar);
|
|
|
|
/* Wait until all characters are sent */
|
|
while (UR (port, UART_R_STATUS) & TxBusy)
|
|
;
|
|
|
|
/* Restore control and interrupt mask */
|
|
UR (port, UART_R_CON) = con;
|
|
UR (port, UART_R_INTEN) = inten;
|
|
}
|
|
|
|
static void __init lh7a40xuart_console_get_options (struct uart_port* port,
|
|
int* baud,
|
|
int* parity,
|
|
int* bits)
|
|
{
|
|
if (UR (port, UART_R_CON) & UARTEN) {
|
|
unsigned int fcon = UR (port, UART_R_FCON);
|
|
unsigned int quot = UR (port, UART_R_BRCON) + 1;
|
|
|
|
switch (fcon & (PEN | EPS)) {
|
|
default: *parity = 'n'; break;
|
|
case PEN: *parity = 'o'; break;
|
|
case PEN | EPS: *parity = 'e'; break;
|
|
}
|
|
|
|
switch (fcon & WLEN) {
|
|
default:
|
|
case WLEN_8: *bits = 8; break;
|
|
case WLEN_7: *bits = 7; break;
|
|
case WLEN_6: *bits = 6; break;
|
|
case WLEN_5: *bits = 5; break;
|
|
}
|
|
|
|
*baud = port->uartclk/(16*quot);
|
|
}
|
|
}
|
|
|
|
static int __init lh7a40xuart_console_setup (struct console* co, char* options)
|
|
{
|
|
struct uart_port* port;
|
|
int baud = 38400;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
int flow = 'n';
|
|
|
|
if (co->index >= DEV_NR) /* Bounds check on device number */
|
|
co->index = 0;
|
|
port = &lh7a40x_ports[co->index].port;
|
|
|
|
if (options)
|
|
uart_parse_options (options, &baud, &parity, &bits, &flow);
|
|
else
|
|
lh7a40xuart_console_get_options (port, &baud, &parity, &bits);
|
|
|
|
return uart_set_options (port, co, baud, parity, bits, flow);
|
|
}
|
|
|
|
static struct uart_driver lh7a40x_reg;
|
|
static struct console lh7a40x_console = {
|
|
.name = "ttyAM",
|
|
.write = lh7a40xuart_console_write,
|
|
.device = uart_console_device,
|
|
.setup = lh7a40xuart_console_setup,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1,
|
|
.data = &lh7a40x_reg,
|
|
};
|
|
|
|
static int __init lh7a40xuart_console_init(void)
|
|
{
|
|
register_console (&lh7a40x_console);
|
|
return 0;
|
|
}
|
|
|
|
console_initcall (lh7a40xuart_console_init);
|
|
|
|
#endif
|
|
|
|
static struct uart_driver lh7a40x_reg = {
|
|
.owner = THIS_MODULE,
|
|
.driver_name = "ttyAM",
|
|
.dev_name = "ttyAM",
|
|
.major = DEV_MAJOR,
|
|
.minor = DEV_MINOR,
|
|
.nr = DEV_NR,
|
|
.cons = LH7A40X_CONSOLE,
|
|
};
|
|
|
|
static int __init lh7a40xuart_init(void)
|
|
{
|
|
int ret;
|
|
|
|
printk (KERN_INFO "serial: LH7A40X serial driver\n");
|
|
|
|
ret = uart_register_driver (&lh7a40x_reg);
|
|
|
|
if (ret == 0) {
|
|
int i;
|
|
|
|
for (i = 0; i < DEV_NR; i++) {
|
|
/* UART3, when used, requires GPIO pin reallocation */
|
|
if (lh7a40x_ports[i].port.mapbase == UART3_PHYS)
|
|
GPIO_PINMUX |= 1<<3;
|
|
uart_add_one_port (&lh7a40x_reg,
|
|
&lh7a40x_ports[i].port);
|
|
}
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static void __exit lh7a40xuart_exit(void)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < DEV_NR; i++)
|
|
uart_remove_one_port (&lh7a40x_reg, &lh7a40x_ports[i].port);
|
|
|
|
uart_unregister_driver (&lh7a40x_reg);
|
|
}
|
|
|
|
module_init (lh7a40xuart_init);
|
|
module_exit (lh7a40xuart_exit);
|
|
|
|
MODULE_AUTHOR ("Marc Singer");
|
|
MODULE_DESCRIPTION ("Sharp LH7A40X serial port driver");
|
|
MODULE_LICENSE ("GPL");
|