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![]() This contains a bunch of fixes and cleanups, mostly to the Tegra210 clock driver. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAljmyG4THHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zof0WD/wIcN4MZ0oOQ3GzCc0Ou0o4NIsyb6xK rETS84l0hNvzuHvaII9NNdnnqONtJfj1J9bqire16zulNmEmtbwgxsvL25DPcLh1 SaYwEyfE44u3TFnx24bAPP31dn9BhPBZOq/Xvs2prjGnmaCDMF/9vY5H4ej6lIuV 6JZYGzqmDy930DBrJ/13nUDzQuhdXky/f7iFHevFHK/yWOVNLPsA6bOrUVJU/1O4 3vAsKJOpbKIYFAR6EltpgB+WhI++0VOnwGCLMwB8eEjQWPIr38qz2kkkLJYy77DC xS58/T4akY/5Hi+gtHK1WyjMxeQsck4fMFCZkl0KqyHRHAHZKmmoIQc+DBVg+FeM AwplwmgW4Mxlk2D3oaO64Vuuu7tVdTmhJSPAtrl5TJLDgx/FTJjIOauWTLmvp9sl wYNHQ7QS/0kkmr+jgo3HxyQfxgm8PHsSzDoDB6VYPCNad0pFMSQATXD9rrppHudh RtHVtgGv2uX/fg4VJzYK/WdkkvCUG/UQQt+eEzZlGqCGj3t28NTqZPSM7YVwggGW nG/SVqV4wlQpSZuUgdKjANmnDaBiksA5/txhTmly37Sv3woI/aWV0THTFjZhsM4o FYGcv6d1tlX57pfC1WboYNVHg7mC6c2R+Ibvjmrrnt8WgfOQTzrNmK8UsqaLiV9h Fonu4UOyF0yX2Q== =fDsq -----END PGP SIGNATURE----- Merge tag 'tegra-for-4.12-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next Pull Tegra clk driver updates from Thierry Reding: This contains a bunch of fixes and cleanups, mostly to the Tegra210 clock driver. * tag 'tegra-for-4.12-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (24 commits) clk: tegra: Don't reset PLL-CX if it is already enabled clk: tegra: Add missing Tegra210 clocks clk: tegra: Propagate clk_out_x rate to parent clk: tegra: Fix build warnings on Tegra20/Tegra30 clk: tegra: Mark TEGRA210_CLK_DBGAPB as always on clk: tegra: Add SATA seq input control clk: tegra: Add Tegra210 special resets clk: tegra: Rework pll_u clk: tegra: Implement reset control reset clk: tegra: Fix disable unused for clocks sharing enable bit clk: tegra: Handle UTMIPLL IDDQ clk: tegra: Add aclk clk: tegra: Add super clock mux/divider clk: tegra: Define Tegra210 DMIC clocks clk: tegra: Fix constness for peripheral clocks clk: tegra: Define Tegra210 DMIC sync clocks clk: tegra: Add CEC clock clk: tegra: Fix type for m field clk: tegra: Correct tegra210_pll_fixed_mdiv_cfg rate calculation clk: tegra: Don't warn for PLL defaults unnecessarily ... |
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.. | ||
at91_pmc.h | ||
bcm2835.h | ||
clk-conf.h | ||
mmp.h | ||
mxs.h | ||
renesas.h | ||
tegra.h | ||
ti.h | ||
zynq.h |