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![zijun_hu](/assets/img/avatar_default.png)
It causes double align requirement for __get_vm_area_node() if parameter size is power of 2 and VM_IOREMAP is set in parameter flags, for example size=0x10000 -> fls_long(0x10000)=17 -> align=0x20000 get_count_order_long() is implemented and can be used instead of fls_long() for fixing the bug, for example size=0x10000 -> get_count_order_long(0x10000)=16 -> align=0x10000 [akpm@linux-foundation.org: s/get_order_long()/get_count_order_long()/] [zijun_hu@zoho.com: fixes] Link: http://lkml.kernel.org/r/57AABC8B.1040409@zoho.com [akpm@linux-foundation.org: locate get_count_order_long() next to get_count_order()] [akpm@linux-foundation.org: move get_count_order[_long] definitions to pick up fls_long()] [zijun_hu@htc.com: move out get_count_order[_long]() from __KERNEL__ scope] Link: http://lkml.kernel.org/r/57B2C4CE.80303@zoho.com Link: http://lkml.kernel.org/r/fc045ecf-20fa-0722-b3ac-9a6140488fad@zoho.com Signed-off-by: zijun_hu <zijun_hu@htc.com> Cc: Tejun Heo <tj@kernel.org> Cc: Johannes Weiner <hannes@cmpxchg.org> Cc: Minchan Kim <minchan@kernel.org> Cc: David Rientjes <rientjes@google.com> Signed-off-by: zijun_hu <zijun_hu@htc.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
275 lines
6.7 KiB
C
275 lines
6.7 KiB
C
#ifndef _LINUX_BITOPS_H
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#define _LINUX_BITOPS_H
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#include <asm/types.h>
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#ifdef __KERNEL__
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#define BIT(nr) (1UL << (nr))
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#define BIT_ULL(nr) (1ULL << (nr))
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#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
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#define BIT_WORD(nr) ((nr) / BITS_PER_LONG)
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#define BIT_ULL_MASK(nr) (1ULL << ((nr) % BITS_PER_LONG_LONG))
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#define BIT_ULL_WORD(nr) ((nr) / BITS_PER_LONG_LONG)
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#define BITS_PER_BYTE 8
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#define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
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#endif
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/*
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* Create a contiguous bitmask starting at bit position @l and ending at
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* position @h. For example
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* GENMASK_ULL(39, 21) gives us the 64bit vector 0x000000ffffe00000.
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*/
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#define GENMASK(h, l) \
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(((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
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#define GENMASK_ULL(h, l) \
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(((~0ULL) << (l)) & (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
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extern unsigned int __sw_hweight8(unsigned int w);
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extern unsigned int __sw_hweight16(unsigned int w);
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extern unsigned int __sw_hweight32(unsigned int w);
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extern unsigned long __sw_hweight64(__u64 w);
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/*
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* Include this here because some architectures need generic_ffs/fls in
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* scope
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*/
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#include <asm/bitops.h>
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#define for_each_set_bit(bit, addr, size) \
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for ((bit) = find_first_bit((addr), (size)); \
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(bit) < (size); \
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(bit) = find_next_bit((addr), (size), (bit) + 1))
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/* same as for_each_set_bit() but use bit as value to start with */
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#define for_each_set_bit_from(bit, addr, size) \
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for ((bit) = find_next_bit((addr), (size), (bit)); \
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(bit) < (size); \
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(bit) = find_next_bit((addr), (size), (bit) + 1))
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#define for_each_clear_bit(bit, addr, size) \
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for ((bit) = find_first_zero_bit((addr), (size)); \
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(bit) < (size); \
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(bit) = find_next_zero_bit((addr), (size), (bit) + 1))
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/* same as for_each_clear_bit() but use bit as value to start with */
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#define for_each_clear_bit_from(bit, addr, size) \
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for ((bit) = find_next_zero_bit((addr), (size), (bit)); \
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(bit) < (size); \
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(bit) = find_next_zero_bit((addr), (size), (bit) + 1))
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static inline int get_bitmask_order(unsigned int count)
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{
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int order;
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order = fls(count);
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return order; /* We could be slightly more clever with -1 here... */
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}
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static __always_inline unsigned long hweight_long(unsigned long w)
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{
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return sizeof(w) == 4 ? hweight32(w) : hweight64(w);
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}
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/**
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* rol64 - rotate a 64-bit value left
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* @word: value to rotate
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* @shift: bits to roll
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*/
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static inline __u64 rol64(__u64 word, unsigned int shift)
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{
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return (word << shift) | (word >> (64 - shift));
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}
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/**
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* ror64 - rotate a 64-bit value right
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* @word: value to rotate
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* @shift: bits to roll
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*/
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static inline __u64 ror64(__u64 word, unsigned int shift)
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{
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return (word >> shift) | (word << (64 - shift));
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}
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/**
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* rol32 - rotate a 32-bit value left
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* @word: value to rotate
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* @shift: bits to roll
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*/
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static inline __u32 rol32(__u32 word, unsigned int shift)
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{
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return (word << shift) | (word >> ((-shift) & 31));
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}
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/**
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* ror32 - rotate a 32-bit value right
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* @word: value to rotate
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* @shift: bits to roll
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*/
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static inline __u32 ror32(__u32 word, unsigned int shift)
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{
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return (word >> shift) | (word << (32 - shift));
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}
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/**
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* rol16 - rotate a 16-bit value left
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* @word: value to rotate
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* @shift: bits to roll
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*/
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static inline __u16 rol16(__u16 word, unsigned int shift)
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{
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return (word << shift) | (word >> (16 - shift));
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}
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/**
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* ror16 - rotate a 16-bit value right
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* @word: value to rotate
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* @shift: bits to roll
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*/
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static inline __u16 ror16(__u16 word, unsigned int shift)
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{
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return (word >> shift) | (word << (16 - shift));
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}
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/**
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* rol8 - rotate an 8-bit value left
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* @word: value to rotate
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* @shift: bits to roll
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*/
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static inline __u8 rol8(__u8 word, unsigned int shift)
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{
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return (word << shift) | (word >> (8 - shift));
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}
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/**
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* ror8 - rotate an 8-bit value right
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* @word: value to rotate
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* @shift: bits to roll
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*/
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static inline __u8 ror8(__u8 word, unsigned int shift)
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{
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return (word >> shift) | (word << (8 - shift));
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}
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/**
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* sign_extend32 - sign extend a 32-bit value using specified bit as sign-bit
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* @value: value to sign extend
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* @index: 0 based bit index (0<=index<32) to sign bit
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*
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* This is safe to use for 16- and 8-bit types as well.
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*/
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static inline __s32 sign_extend32(__u32 value, int index)
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{
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__u8 shift = 31 - index;
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return (__s32)(value << shift) >> shift;
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}
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/**
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* sign_extend64 - sign extend a 64-bit value using specified bit as sign-bit
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* @value: value to sign extend
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* @index: 0 based bit index (0<=index<64) to sign bit
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*/
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static inline __s64 sign_extend64(__u64 value, int index)
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{
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__u8 shift = 63 - index;
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return (__s64)(value << shift) >> shift;
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}
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static inline unsigned fls_long(unsigned long l)
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{
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if (sizeof(l) == 4)
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return fls(l);
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return fls64(l);
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}
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static inline int get_count_order(unsigned int count)
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{
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int order;
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order = fls(count) - 1;
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if (count & (count - 1))
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order++;
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return order;
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}
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/**
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* get_count_order_long - get order after rounding @l up to power of 2
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* @l: parameter
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*
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* it is same as get_count_order() but with long type parameter
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*/
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static inline int get_count_order_long(unsigned long l)
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{
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if (l == 0UL)
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return -1;
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else if (l & (l - 1UL))
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return (int)fls_long(l);
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else
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return (int)fls_long(l) - 1;
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}
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/**
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* __ffs64 - find first set bit in a 64 bit word
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* @word: The 64 bit word
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*
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* On 64 bit arches this is a synomyn for __ffs
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* The result is not defined if no bits are set, so check that @word
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* is non-zero before calling this.
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*/
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static inline unsigned long __ffs64(u64 word)
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{
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#if BITS_PER_LONG == 32
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if (((u32)word) == 0UL)
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return __ffs((u32)(word >> 32)) + 32;
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#elif BITS_PER_LONG != 64
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#error BITS_PER_LONG not 32 or 64
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#endif
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return __ffs((unsigned long)word);
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}
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#ifdef __KERNEL__
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#ifndef set_mask_bits
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#define set_mask_bits(ptr, _mask, _bits) \
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({ \
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const typeof(*ptr) mask = (_mask), bits = (_bits); \
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typeof(*ptr) old, new; \
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\
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do { \
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old = ACCESS_ONCE(*ptr); \
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new = (old & ~mask) | bits; \
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} while (cmpxchg(ptr, old, new) != old); \
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\
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new; \
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})
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#endif
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#ifndef bit_clear_unless
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#define bit_clear_unless(ptr, _clear, _test) \
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({ \
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const typeof(*ptr) clear = (_clear), test = (_test); \
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typeof(*ptr) old, new; \
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\
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do { \
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old = ACCESS_ONCE(*ptr); \
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new = old & ~clear; \
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} while (!(old & test) && \
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cmpxchg(ptr, old, new) != old); \
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\
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!(old & test); \
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})
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#endif
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#ifndef find_last_bit
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/**
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* find_last_bit - find the last set bit in a memory region
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* @addr: The address to start the search at
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* @size: The number of bits to search
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*
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* Returns the bit number of the last set bit, or size.
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*/
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extern unsigned long find_last_bit(const unsigned long *addr,
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unsigned long size);
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#endif
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#endif /* __KERNEL__ */
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#endif
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