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Add support for single and double tap events based on the tap threshold value, minimum quiet time before and after the tap and minimum time between the taps in the double tap. The INT1 pin is used to interrupt and the event is pushed to userspace. Signed-off-by: Jagath Jog J <jagathjog1996@gmail.com> Link: https://lore.kernel.org/r/20220831063117.4141-3-jagathjog1996@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
153 lines
4.8 KiB
C
153 lines
4.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Register constants and other forward declarations needed by the bma400
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* sources.
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*
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* Copyright 2019 Dan Robertson <dan@dlrobertson.com>
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*/
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#ifndef _BMA400_H_
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#define _BMA400_H_
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#include <linux/bits.h>
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#include <linux/regmap.h>
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/*
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* Read-Only Registers
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*/
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/* Status and ID registers */
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#define BMA400_CHIP_ID_REG 0x00
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#define BMA400_ERR_REG 0x02
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#define BMA400_STATUS_REG 0x03
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/* Acceleration registers */
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#define BMA400_X_AXIS_LSB_REG 0x04
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#define BMA400_X_AXIS_MSB_REG 0x05
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#define BMA400_Y_AXIS_LSB_REG 0x06
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#define BMA400_Y_AXIS_MSB_REG 0x07
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#define BMA400_Z_AXIS_LSB_REG 0x08
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#define BMA400_Z_AXIS_MSB_REG 0x09
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/* Sensor time registers */
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#define BMA400_SENSOR_TIME0 0x0a
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#define BMA400_SENSOR_TIME1 0x0b
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#define BMA400_SENSOR_TIME2 0x0c
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/* Event and interrupt registers */
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#define BMA400_EVENT_REG 0x0d
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#define BMA400_INT_STAT0_REG 0x0e
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#define BMA400_INT_STAT1_REG 0x0f
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#define BMA400_INT_STAT2_REG 0x10
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#define BMA400_INT12_MAP_REG 0x23
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#define BMA400_INT_ENG_OVRUN_MSK BIT(4)
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/* Temperature register */
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#define BMA400_TEMP_DATA_REG 0x11
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/* FIFO length and data registers */
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#define BMA400_FIFO_LENGTH0_REG 0x12
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#define BMA400_FIFO_LENGTH1_REG 0x13
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#define BMA400_FIFO_DATA_REG 0x14
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/* Step count registers */
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#define BMA400_STEP_CNT0_REG 0x15
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#define BMA400_STEP_CNT1_REG 0x16
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#define BMA400_STEP_CNT3_REG 0x17
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#define BMA400_STEP_STAT_REG 0x18
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#define BMA400_STEP_INT_MSK BIT(0)
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#define BMA400_STEP_RAW_LEN 0x03
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#define BMA400_STEP_STAT_MASK GENMASK(9, 8)
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/*
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* Read-write configuration registers
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*/
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#define BMA400_ACC_CONFIG0_REG 0x19
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#define BMA400_ACC_CONFIG1_REG 0x1a
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#define BMA400_ACC_CONFIG2_REG 0x1b
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#define BMA400_CMD_REG 0x7e
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/* Interrupt registers */
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#define BMA400_INT_CONFIG0_REG 0x1f
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#define BMA400_INT_CONFIG1_REG 0x20
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#define BMA400_INT1_MAP_REG 0x21
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#define BMA400_INT_IO_CTRL_REG 0x24
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#define BMA400_INT_DRDY_MSK BIT(7)
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/* Chip ID of BMA 400 devices found in the chip ID register. */
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#define BMA400_ID_REG_VAL 0x90
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#define BMA400_LP_OSR_SHIFT 5
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#define BMA400_NP_OSR_SHIFT 4
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#define BMA400_SCALE_SHIFT 6
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#define BMA400_TWO_BITS_MASK GENMASK(1, 0)
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#define BMA400_LP_OSR_MASK GENMASK(6, 5)
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#define BMA400_NP_OSR_MASK GENMASK(5, 4)
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#define BMA400_ACC_ODR_MASK GENMASK(3, 0)
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#define BMA400_ACC_SCALE_MASK GENMASK(7, 6)
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#define BMA400_ACC_ODR_MIN_RAW 0x05
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#define BMA400_ACC_ODR_LP_RAW 0x06
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#define BMA400_ACC_ODR_MAX_RAW 0x0b
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#define BMA400_ACC_ODR_MAX_HZ 800
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#define BMA400_ACC_ODR_MIN_WHOLE_HZ 25
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#define BMA400_ACC_ODR_MIN_HZ 12
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/* Generic interrupts register */
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#define BMA400_GEN1INT_CONFIG0 0x3f
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#define BMA400_GEN2INT_CONFIG0 0x4A
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#define BMA400_GEN_CONFIG1_OFF 0x01
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#define BMA400_GEN_CONFIG2_OFF 0x02
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#define BMA400_GEN_CONFIG3_OFF 0x03
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#define BMA400_GEN_CONFIG31_OFF 0x04
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#define BMA400_INT_GEN1_MSK BIT(2)
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#define BMA400_INT_GEN2_MSK BIT(3)
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#define BMA400_GEN_HYST_MSK GENMASK(1, 0)
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/* TAP config registers */
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#define BMA400_TAP_CONFIG 0x57
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#define BMA400_TAP_CONFIG1 0x58
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#define BMA400_S_TAP_MSK BIT(2)
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#define BMA400_D_TAP_MSK BIT(3)
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#define BMA400_INT_S_TAP_MSK BIT(10)
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#define BMA400_INT_D_TAP_MSK BIT(11)
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#define BMA400_TAP_SEN_MSK GENMASK(2, 0)
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#define BMA400_TAP_TICSTH_MSK GENMASK(1, 0)
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#define BMA400_TAP_QUIET_MSK GENMASK(3, 2)
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#define BMA400_TAP_QUIETDT_MSK GENMASK(5, 4)
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#define BMA400_TAP_TIM_LIST_LEN 4
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/*
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* BMA400_SCALE_MIN macro value represents m/s^2 for 1 LSB before
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* converting to micro values for +-2g range.
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*
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* For +-2g - 1 LSB = 0.976562 milli g = 0.009576 m/s^2
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* For +-4g - 1 LSB = 1.953125 milli g = 0.019153 m/s^2
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* For +-16g - 1 LSB = 7.8125 milli g = 0.076614 m/s^2
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*
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* The raw value which is used to select the different ranges is determined
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* by the first bit set position from the scale value, so BMA400_SCALE_MIN
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* should be odd.
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*
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* Scale values for +-2g, +-4g, +-8g and +-16g are populated into bma400_scales
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* array by left shifting BMA400_SCALE_MIN.
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* e.g.:
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* To select +-2g = 9577 << 0 = raw value to write is 0.
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* To select +-8g = 9577 << 2 = raw value to write is 2.
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* To select +-16g = 9577 << 3 = raw value to write is 3.
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*/
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#define BMA400_SCALE_MIN 9577
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#define BMA400_SCALE_MAX 76617
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#define BMA400_NUM_REGULATORS 2
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#define BMA400_VDD_REGULATOR 0
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#define BMA400_VDDIO_REGULATOR 1
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extern const struct regmap_config bma400_regmap_config;
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int bma400_probe(struct device *dev, struct regmap *regmap, int irq,
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const char *name);
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#endif
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