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a2faac3986
Similar to commita6c30873ee("ARM: 8989/1: use .fpu assembler directives instead of assembler arguments"). GCC and GNU binutils support setting the "sub arch" via -march=, -Wa,-march, target function attribute, and .arch assembler directive. Clang was missing support for -Wa,-march=, but this was implemented in clang-13. The behavior of both GCC and Clang is to prefer -Wa,-march= over -march= for assembler and assembler-with-cpp sources, but Clang will warn about the -march= being unused. clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument] Since most assembler is non-conditionally assembled with one sub arch (modulo arch/arm/delay-loop.S which conditionally is assembled as armv4 based on CONFIG_ARCH_RPC, and arch/arm/mach-at91/pm-suspend.S which is conditionally assembled as armv7-a based on CONFIG_CPU_V7), prefer the .arch assembler directive. Add a few more instances found in compile testing as found by Arnd and Nathan. Link:1d51c699b9Link: https://bugs.llvm.org/show_bug.cgi?id=48894 Link: https://github.com/ClangBuiltLinux/linux/issues/1195 Link: https://github.com/ClangBuiltLinux/linux/issues/1315 Suggested-by: Arnd Bergmann <arnd@arndb.de> Suggested-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
37 lines
746 B
ArmAsm
37 lines
746 B
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/assembler.h>
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.arch armv7-a
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diag_reg_offset:
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.word g_diag_reg - .
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.macro set_diag_reg
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adr r0, diag_reg_offset
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ldr r1, [r0]
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add r1, r1, r0 @ r1 = physical &g_diag_reg
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ldr r0, [r1]
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mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
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.endm
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ENTRY(v7_secondary_startup)
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ARM_BE8(setend be) @ go BE8 if entered LE
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mrc p15, 0, r0, c0, c0, 0
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lsl r0, r0, #16
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lsr r0, r0, #20
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/* 0xc07 is cortex A7's ID */
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mov r1, #0xc00
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orr r1, #0x7
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cmp r0, r1
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beq secondary_startup
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set_diag_reg
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b secondary_startup
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ENDPROC(v7_secondary_startup)
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