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d12157efc8
Most architectures define the atomic/atomic64 xchg and cmpxchg operations in terms of arch_xchg and arch_cmpxchg respectfully. Add fallbacks for these cases and remove the trivial cases from arch code. On some architectures the existing definitions are kept as these are used to build other arch_atomic*() operations. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Kees Cook <keescook@chromium.org> Link: https://lore.kernel.org/r/20230605070124.3741859-5-mark.rutland@arm.com
198 lines
7.2 KiB
C
198 lines
7.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Based on arch/arm/include/asm/atomic.h
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*
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* Copyright (C) 1996 Russell King.
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* Copyright (C) 2002 Deep Blue Solutions Ltd.
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* Copyright (C) 2012 ARM Ltd.
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*/
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#ifndef __ASM_ATOMIC_H
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#define __ASM_ATOMIC_H
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#include <linux/compiler.h>
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#include <linux/types.h>
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#include <asm/barrier.h>
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#include <asm/cmpxchg.h>
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#include <asm/lse.h>
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#define ATOMIC_OP(op) \
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static __always_inline void arch_##op(int i, atomic_t *v) \
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{ \
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__lse_ll_sc_body(op, i, v); \
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}
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ATOMIC_OP(atomic_andnot)
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ATOMIC_OP(atomic_or)
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ATOMIC_OP(atomic_xor)
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ATOMIC_OP(atomic_add)
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ATOMIC_OP(atomic_and)
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ATOMIC_OP(atomic_sub)
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#undef ATOMIC_OP
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#define ATOMIC_FETCH_OP(name, op) \
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static __always_inline int arch_##op##name(int i, atomic_t *v) \
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{ \
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return __lse_ll_sc_body(op##name, i, v); \
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}
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#define ATOMIC_FETCH_OPS(op) \
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ATOMIC_FETCH_OP(_relaxed, op) \
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ATOMIC_FETCH_OP(_acquire, op) \
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ATOMIC_FETCH_OP(_release, op) \
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ATOMIC_FETCH_OP( , op)
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ATOMIC_FETCH_OPS(atomic_fetch_andnot)
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ATOMIC_FETCH_OPS(atomic_fetch_or)
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ATOMIC_FETCH_OPS(atomic_fetch_xor)
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ATOMIC_FETCH_OPS(atomic_fetch_add)
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ATOMIC_FETCH_OPS(atomic_fetch_and)
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ATOMIC_FETCH_OPS(atomic_fetch_sub)
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ATOMIC_FETCH_OPS(atomic_add_return)
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ATOMIC_FETCH_OPS(atomic_sub_return)
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#undef ATOMIC_FETCH_OP
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#undef ATOMIC_FETCH_OPS
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#define ATOMIC64_OP(op) \
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static __always_inline void arch_##op(long i, atomic64_t *v) \
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{ \
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__lse_ll_sc_body(op, i, v); \
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}
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ATOMIC64_OP(atomic64_andnot)
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ATOMIC64_OP(atomic64_or)
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ATOMIC64_OP(atomic64_xor)
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ATOMIC64_OP(atomic64_add)
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ATOMIC64_OP(atomic64_and)
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ATOMIC64_OP(atomic64_sub)
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#undef ATOMIC64_OP
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#define ATOMIC64_FETCH_OP(name, op) \
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static __always_inline long arch_##op##name(long i, atomic64_t *v) \
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{ \
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return __lse_ll_sc_body(op##name, i, v); \
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}
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#define ATOMIC64_FETCH_OPS(op) \
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ATOMIC64_FETCH_OP(_relaxed, op) \
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ATOMIC64_FETCH_OP(_acquire, op) \
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ATOMIC64_FETCH_OP(_release, op) \
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ATOMIC64_FETCH_OP( , op)
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ATOMIC64_FETCH_OPS(atomic64_fetch_andnot)
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ATOMIC64_FETCH_OPS(atomic64_fetch_or)
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ATOMIC64_FETCH_OPS(atomic64_fetch_xor)
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ATOMIC64_FETCH_OPS(atomic64_fetch_add)
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ATOMIC64_FETCH_OPS(atomic64_fetch_and)
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ATOMIC64_FETCH_OPS(atomic64_fetch_sub)
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ATOMIC64_FETCH_OPS(atomic64_add_return)
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ATOMIC64_FETCH_OPS(atomic64_sub_return)
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#undef ATOMIC64_FETCH_OP
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#undef ATOMIC64_FETCH_OPS
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static __always_inline long arch_atomic64_dec_if_positive(atomic64_t *v)
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{
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return __lse_ll_sc_body(atomic64_dec_if_positive, v);
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}
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#define arch_atomic_read(v) __READ_ONCE((v)->counter)
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#define arch_atomic_set(v, i) __WRITE_ONCE(((v)->counter), (i))
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#define arch_atomic_add_return_relaxed arch_atomic_add_return_relaxed
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#define arch_atomic_add_return_acquire arch_atomic_add_return_acquire
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#define arch_atomic_add_return_release arch_atomic_add_return_release
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#define arch_atomic_add_return arch_atomic_add_return
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#define arch_atomic_sub_return_relaxed arch_atomic_sub_return_relaxed
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#define arch_atomic_sub_return_acquire arch_atomic_sub_return_acquire
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#define arch_atomic_sub_return_release arch_atomic_sub_return_release
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#define arch_atomic_sub_return arch_atomic_sub_return
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#define arch_atomic_fetch_add_relaxed arch_atomic_fetch_add_relaxed
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#define arch_atomic_fetch_add_acquire arch_atomic_fetch_add_acquire
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#define arch_atomic_fetch_add_release arch_atomic_fetch_add_release
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#define arch_atomic_fetch_add arch_atomic_fetch_add
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#define arch_atomic_fetch_sub_relaxed arch_atomic_fetch_sub_relaxed
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#define arch_atomic_fetch_sub_acquire arch_atomic_fetch_sub_acquire
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#define arch_atomic_fetch_sub_release arch_atomic_fetch_sub_release
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#define arch_atomic_fetch_sub arch_atomic_fetch_sub
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#define arch_atomic_fetch_and_relaxed arch_atomic_fetch_and_relaxed
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#define arch_atomic_fetch_and_acquire arch_atomic_fetch_and_acquire
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#define arch_atomic_fetch_and_release arch_atomic_fetch_and_release
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#define arch_atomic_fetch_and arch_atomic_fetch_and
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#define arch_atomic_fetch_andnot_relaxed arch_atomic_fetch_andnot_relaxed
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#define arch_atomic_fetch_andnot_acquire arch_atomic_fetch_andnot_acquire
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#define arch_atomic_fetch_andnot_release arch_atomic_fetch_andnot_release
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#define arch_atomic_fetch_andnot arch_atomic_fetch_andnot
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#define arch_atomic_fetch_or_relaxed arch_atomic_fetch_or_relaxed
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#define arch_atomic_fetch_or_acquire arch_atomic_fetch_or_acquire
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#define arch_atomic_fetch_or_release arch_atomic_fetch_or_release
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#define arch_atomic_fetch_or arch_atomic_fetch_or
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#define arch_atomic_fetch_xor_relaxed arch_atomic_fetch_xor_relaxed
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#define arch_atomic_fetch_xor_acquire arch_atomic_fetch_xor_acquire
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#define arch_atomic_fetch_xor_release arch_atomic_fetch_xor_release
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#define arch_atomic_fetch_xor arch_atomic_fetch_xor
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#define arch_atomic_andnot arch_atomic_andnot
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/*
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* 64-bit arch_atomic operations.
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*/
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#define ATOMIC64_INIT ATOMIC_INIT
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#define arch_atomic64_read arch_atomic_read
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#define arch_atomic64_set arch_atomic_set
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#define arch_atomic64_add_return_relaxed arch_atomic64_add_return_relaxed
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#define arch_atomic64_add_return_acquire arch_atomic64_add_return_acquire
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#define arch_atomic64_add_return_release arch_atomic64_add_return_release
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#define arch_atomic64_add_return arch_atomic64_add_return
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#define arch_atomic64_sub_return_relaxed arch_atomic64_sub_return_relaxed
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#define arch_atomic64_sub_return_acquire arch_atomic64_sub_return_acquire
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#define arch_atomic64_sub_return_release arch_atomic64_sub_return_release
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#define arch_atomic64_sub_return arch_atomic64_sub_return
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#define arch_atomic64_fetch_add_relaxed arch_atomic64_fetch_add_relaxed
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#define arch_atomic64_fetch_add_acquire arch_atomic64_fetch_add_acquire
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#define arch_atomic64_fetch_add_release arch_atomic64_fetch_add_release
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#define arch_atomic64_fetch_add arch_atomic64_fetch_add
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#define arch_atomic64_fetch_sub_relaxed arch_atomic64_fetch_sub_relaxed
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#define arch_atomic64_fetch_sub_acquire arch_atomic64_fetch_sub_acquire
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#define arch_atomic64_fetch_sub_release arch_atomic64_fetch_sub_release
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#define arch_atomic64_fetch_sub arch_atomic64_fetch_sub
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#define arch_atomic64_fetch_and_relaxed arch_atomic64_fetch_and_relaxed
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#define arch_atomic64_fetch_and_acquire arch_atomic64_fetch_and_acquire
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#define arch_atomic64_fetch_and_release arch_atomic64_fetch_and_release
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#define arch_atomic64_fetch_and arch_atomic64_fetch_and
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#define arch_atomic64_fetch_andnot_relaxed arch_atomic64_fetch_andnot_relaxed
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#define arch_atomic64_fetch_andnot_acquire arch_atomic64_fetch_andnot_acquire
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#define arch_atomic64_fetch_andnot_release arch_atomic64_fetch_andnot_release
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#define arch_atomic64_fetch_andnot arch_atomic64_fetch_andnot
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#define arch_atomic64_fetch_or_relaxed arch_atomic64_fetch_or_relaxed
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#define arch_atomic64_fetch_or_acquire arch_atomic64_fetch_or_acquire
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#define arch_atomic64_fetch_or_release arch_atomic64_fetch_or_release
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#define arch_atomic64_fetch_or arch_atomic64_fetch_or
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#define arch_atomic64_fetch_xor_relaxed arch_atomic64_fetch_xor_relaxed
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#define arch_atomic64_fetch_xor_acquire arch_atomic64_fetch_xor_acquire
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#define arch_atomic64_fetch_xor_release arch_atomic64_fetch_xor_release
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#define arch_atomic64_fetch_xor arch_atomic64_fetch_xor
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#define arch_atomic64_andnot arch_atomic64_andnot
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#define arch_atomic64_dec_if_positive arch_atomic64_dec_if_positive
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#endif /* __ASM_ATOMIC_H */
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