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![Jean Delvare](/assets/img/avatar_default.png)
I noticed that many source files include <linux/pci.h> while they do not appear to need it. Here is an attempt to clean it all up. In order to find all possibly affected files, I searched for all files including <linux/pci.h> but without any other occurence of "pci" or "PCI". I removed the include statement from all of these, then I compiled an allmodconfig kernel on both i386 and x86_64 and fixed the false positives manually. My tests covered 66% of the affected files, so there could be false positives remaining. Untested files are: arch/alpha/kernel/err_common.c arch/alpha/kernel/err_ev6.c arch/alpha/kernel/err_ev7.c arch/ia64/sn/kernel/huberror.c arch/ia64/sn/kernel/xpnet.c arch/m68knommu/kernel/dma.c arch/mips/lib/iomap.c arch/powerpc/platforms/pseries/ras.c arch/ppc/8260_io/enet.c arch/ppc/8260_io/fcc_enet.c arch/ppc/8xx_io/enet.c arch/ppc/syslib/ppc4xx_sgdma.c arch/sh64/mach-cayman/iomap.c arch/xtensa/kernel/xtensa_ksyms.c arch/xtensa/platform-iss/setup.c drivers/i2c/busses/i2c-at91.c drivers/i2c/busses/i2c-mpc.c drivers/media/video/saa711x.c drivers/misc/hdpuftrs/hdpu_cpustate.c drivers/misc/hdpuftrs/hdpu_nexus.c drivers/net/au1000_eth.c drivers/net/fec_8xx/fec_main.c drivers/net/fec_8xx/fec_mii.c drivers/net/fs_enet/fs_enet-main.c drivers/net/fs_enet/mac-fcc.c drivers/net/fs_enet/mac-fec.c drivers/net/fs_enet/mac-scc.c drivers/net/fs_enet/mii-bitbang.c drivers/net/fs_enet/mii-fec.c drivers/net/ibm_emac/ibm_emac_core.c drivers/net/lasi_82596.c drivers/parisc/hppb.c drivers/sbus/sbus.c drivers/video/g364fb.c drivers/video/platinumfb.c drivers/video/stifb.c drivers/video/valkyriefb.c include/asm-arm/arch-ixp4xx/dma.h sound/oss/au1550_ac97.c I would welcome test reports for these files. I am fine with removing the untested files from the patch if the general opinion is that these changes aren't safe. The tested part would still be nice to have. Note that this patch depends on another header fixup patch I submitted to LKML yesterday: [PATCH] scatterlist.h needs types.h http://lkml.org/lkml/2007/3/01/141 Signed-off-by: Jean Delvare <khali@linux-fr.org> Cc: Badari Pulavarty <pbadari@us.ibm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
844 lines
25 KiB
C
844 lines
25 KiB
C
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/*
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* Linux driver for Disk-On-Chip Millennium
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* (c) 1999 Machine Vision Holdings, Inc.
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* (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
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*
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* $Id: doc2001.c,v 1.49 2005/11/07 11:14:24 gleixner Exp $
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <asm/errno.h>
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#include <asm/io.h>
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#include <asm/uaccess.h>
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#include <linux/miscdevice.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/bitops.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/doc2000.h>
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/* #define ECC_DEBUG */
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/* I have no idea why some DoC chips can not use memcop_form|to_io().
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* This may be due to the different revisions of the ASIC controller built-in or
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* simplily a QA/Bug issue. Who knows ?? If you have trouble, please uncomment
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* this:*/
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#undef USE_MEMCPY
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static int doc_read(struct mtd_info *mtd, loff_t from, size_t len,
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size_t *retlen, u_char *buf);
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static int doc_write(struct mtd_info *mtd, loff_t to, size_t len,
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size_t *retlen, const u_char *buf);
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static int doc_read_oob(struct mtd_info *mtd, loff_t ofs,
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struct mtd_oob_ops *ops);
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static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,
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struct mtd_oob_ops *ops);
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static int doc_erase (struct mtd_info *mtd, struct erase_info *instr);
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static struct mtd_info *docmillist = NULL;
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/* Perform the required delay cycles by reading from the NOP register */
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static void DoC_Delay(void __iomem * docptr, unsigned short cycles)
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{
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volatile char dummy;
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int i;
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for (i = 0; i < cycles; i++)
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dummy = ReadDOC(docptr, NOP);
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}
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/* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */
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static int _DoC_WaitReady(void __iomem * docptr)
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{
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unsigned short c = 0xffff;
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DEBUG(MTD_DEBUG_LEVEL3,
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"_DoC_WaitReady called for out-of-line wait\n");
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/* Out-of-line routine to wait for chip response */
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while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B) && --c)
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;
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if (c == 0)
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DEBUG(MTD_DEBUG_LEVEL2, "_DoC_WaitReady timed out.\n");
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return (c == 0);
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}
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static inline int DoC_WaitReady(void __iomem * docptr)
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{
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/* This is inline, to optimise the common case, where it's ready instantly */
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int ret = 0;
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/* 4 read form NOP register should be issued in prior to the read from CDSNControl
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see Software Requirement 11.4 item 2. */
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DoC_Delay(docptr, 4);
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if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B))
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/* Call the out-of-line routine to wait */
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ret = _DoC_WaitReady(docptr);
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/* issue 2 read from NOP register after reading from CDSNControl register
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see Software Requirement 11.4 item 2. */
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DoC_Delay(docptr, 2);
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return ret;
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}
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/* DoC_Command: Send a flash command to the flash chip through the CDSN IO register
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with the internal pipeline. Each of 4 delay cycles (read from the NOP register) is
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required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */
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static void DoC_Command(void __iomem * docptr, unsigned char command,
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unsigned char xtraflags)
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{
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/* Assert the CLE (Command Latch Enable) line to the flash chip */
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WriteDOC(xtraflags | CDSN_CTRL_CLE | CDSN_CTRL_CE, docptr, CDSNControl);
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DoC_Delay(docptr, 4);
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/* Send the command */
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WriteDOC(command, docptr, Mil_CDSN_IO);
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WriteDOC(0x00, docptr, WritePipeTerm);
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/* Lower the CLE line */
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WriteDOC(xtraflags | CDSN_CTRL_CE, docptr, CDSNControl);
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DoC_Delay(docptr, 4);
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}
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/* DoC_Address: Set the current address for the flash chip through the CDSN IO register
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with the internal pipeline. Each of 4 delay cycles (read from the NOP register) is
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required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */
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static inline void DoC_Address(void __iomem * docptr, int numbytes, unsigned long ofs,
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unsigned char xtraflags1, unsigned char xtraflags2)
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{
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/* Assert the ALE (Address Latch Enable) line to the flash chip */
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WriteDOC(xtraflags1 | CDSN_CTRL_ALE | CDSN_CTRL_CE, docptr, CDSNControl);
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DoC_Delay(docptr, 4);
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/* Send the address */
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switch (numbytes)
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{
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case 1:
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/* Send single byte, bits 0-7. */
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WriteDOC(ofs & 0xff, docptr, Mil_CDSN_IO);
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WriteDOC(0x00, docptr, WritePipeTerm);
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break;
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case 2:
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/* Send bits 9-16 followed by 17-23 */
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WriteDOC((ofs >> 9) & 0xff, docptr, Mil_CDSN_IO);
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WriteDOC((ofs >> 17) & 0xff, docptr, Mil_CDSN_IO);
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WriteDOC(0x00, docptr, WritePipeTerm);
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break;
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case 3:
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/* Send 0-7, 9-16, then 17-23 */
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WriteDOC(ofs & 0xff, docptr, Mil_CDSN_IO);
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WriteDOC((ofs >> 9) & 0xff, docptr, Mil_CDSN_IO);
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WriteDOC((ofs >> 17) & 0xff, docptr, Mil_CDSN_IO);
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WriteDOC(0x00, docptr, WritePipeTerm);
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break;
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default:
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return;
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}
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/* Lower the ALE line */
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WriteDOC(xtraflags1 | xtraflags2 | CDSN_CTRL_CE, docptr, CDSNControl);
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DoC_Delay(docptr, 4);
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}
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/* DoC_SelectChip: Select a given flash chip within the current floor */
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static int DoC_SelectChip(void __iomem * docptr, int chip)
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{
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/* Select the individual flash chip requested */
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WriteDOC(chip, docptr, CDSNDeviceSelect);
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DoC_Delay(docptr, 4);
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/* Wait for it to be ready */
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return DoC_WaitReady(docptr);
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}
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/* DoC_SelectFloor: Select a given floor (bank of flash chips) */
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static int DoC_SelectFloor(void __iomem * docptr, int floor)
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{
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/* Select the floor (bank) of chips required */
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WriteDOC(floor, docptr, FloorSelect);
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/* Wait for the chip to be ready */
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return DoC_WaitReady(docptr);
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}
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/* DoC_IdentChip: Identify a given NAND chip given {floor,chip} */
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static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip)
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{
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int mfr, id, i, j;
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volatile char dummy;
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/* Page in the required floor/chip
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FIXME: is this supported by Millennium ?? */
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DoC_SelectFloor(doc->virtadr, floor);
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DoC_SelectChip(doc->virtadr, chip);
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/* Reset the chip, see Software Requirement 11.4 item 1. */
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DoC_Command(doc->virtadr, NAND_CMD_RESET, CDSN_CTRL_WP);
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DoC_WaitReady(doc->virtadr);
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/* Read the NAND chip ID: 1. Send ReadID command */
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DoC_Command(doc->virtadr, NAND_CMD_READID, CDSN_CTRL_WP);
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/* Read the NAND chip ID: 2. Send address byte zero */
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DoC_Address(doc->virtadr, 1, 0x00, CDSN_CTRL_WP, 0x00);
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/* Read the manufacturer and device id codes of the flash device through
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CDSN IO register see Software Requirement 11.4 item 5.*/
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dummy = ReadDOC(doc->virtadr, ReadPipeInit);
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DoC_Delay(doc->virtadr, 2);
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mfr = ReadDOC(doc->virtadr, Mil_CDSN_IO);
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DoC_Delay(doc->virtadr, 2);
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id = ReadDOC(doc->virtadr, Mil_CDSN_IO);
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dummy = ReadDOC(doc->virtadr, LastDataRead);
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/* No response - return failure */
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if (mfr == 0xff || mfr == 0)
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return 0;
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/* FIXME: to deal with multi-flash on multi-Millennium case more carefully */
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for (i = 0; nand_flash_ids[i].name != NULL; i++) {
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if ( id == nand_flash_ids[i].id) {
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/* Try to identify manufacturer */
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for (j = 0; nand_manuf_ids[j].id != 0x0; j++) {
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if (nand_manuf_ids[j].id == mfr)
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break;
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}
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printk(KERN_INFO "Flash chip found: Manufacturer ID: %2.2X, "
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"Chip ID: %2.2X (%s:%s)\n",
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mfr, id, nand_manuf_ids[j].name, nand_flash_ids[i].name);
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doc->mfr = mfr;
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doc->id = id;
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doc->chipshift = ffs((nand_flash_ids[i].chipsize << 20)) - 1;
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break;
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}
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}
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if (nand_flash_ids[i].name == NULL)
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return 0;
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else
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return 1;
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}
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/* DoC_ScanChips: Find all NAND chips present in a DiskOnChip, and identify them */
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static void DoC_ScanChips(struct DiskOnChip *this)
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{
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int floor, chip;
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int numchips[MAX_FLOORS_MIL];
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int ret;
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this->numchips = 0;
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this->mfr = 0;
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this->id = 0;
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/* For each floor, find the number of valid chips it contains */
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for (floor = 0,ret = 1; floor < MAX_FLOORS_MIL; floor++) {
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numchips[floor] = 0;
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for (chip = 0; chip < MAX_CHIPS_MIL && ret != 0; chip++) {
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ret = DoC_IdentChip(this, floor, chip);
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if (ret) {
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numchips[floor]++;
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this->numchips++;
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}
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}
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}
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/* If there are none at all that we recognise, bail */
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if (!this->numchips) {
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printk("No flash chips recognised.\n");
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return;
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}
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/* Allocate an array to hold the information for each chip */
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this->chips = kmalloc(sizeof(struct Nand) * this->numchips, GFP_KERNEL);
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if (!this->chips){
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printk("No memory for allocating chip info structures\n");
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return;
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}
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/* Fill out the chip array with {floor, chipno} for each
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* detected chip in the device. */
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for (floor = 0, ret = 0; floor < MAX_FLOORS_MIL; floor++) {
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for (chip = 0 ; chip < numchips[floor] ; chip++) {
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this->chips[ret].floor = floor;
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this->chips[ret].chip = chip;
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this->chips[ret].curadr = 0;
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this->chips[ret].curmode = 0x50;
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ret++;
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}
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}
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/* Calculate and print the total size of the device */
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this->totlen = this->numchips * (1 << this->chipshift);
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printk(KERN_INFO "%d flash chips found. Total DiskOnChip size: %ld MiB\n",
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this->numchips ,this->totlen >> 20);
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}
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static int DoCMil_is_alias(struct DiskOnChip *doc1, struct DiskOnChip *doc2)
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{
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int tmp1, tmp2, retval;
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if (doc1->physadr == doc2->physadr)
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return 1;
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/* Use the alias resolution register which was set aside for this
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* purpose. If it's value is the same on both chips, they might
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* be the same chip, and we write to one and check for a change in
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* the other. It's unclear if this register is usuable in the
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* DoC 2000 (it's in the Millenium docs), but it seems to work. */
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tmp1 = ReadDOC(doc1->virtadr, AliasResolution);
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tmp2 = ReadDOC(doc2->virtadr, AliasResolution);
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if (tmp1 != tmp2)
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return 0;
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WriteDOC((tmp1+1) % 0xff, doc1->virtadr, AliasResolution);
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tmp2 = ReadDOC(doc2->virtadr, AliasResolution);
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if (tmp2 == (tmp1+1) % 0xff)
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retval = 1;
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else
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retval = 0;
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/* Restore register contents. May not be necessary, but do it just to
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* be safe. */
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WriteDOC(tmp1, doc1->virtadr, AliasResolution);
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return retval;
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}
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/* This routine is found from the docprobe code by symbol_get(),
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* which will bump the use count of this module. */
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void DoCMil_init(struct mtd_info *mtd)
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{
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struct DiskOnChip *this = mtd->priv;
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struct DiskOnChip *old = NULL;
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/* We must avoid being called twice for the same device. */
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if (docmillist)
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old = docmillist->priv;
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while (old) {
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if (DoCMil_is_alias(this, old)) {
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printk(KERN_NOTICE "Ignoring DiskOnChip Millennium at "
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"0x%lX - already configured\n", this->physadr);
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iounmap(this->virtadr);
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kfree(mtd);
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return;
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}
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if (old->nextdoc)
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old = old->nextdoc->priv;
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else
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old = NULL;
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}
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mtd->name = "DiskOnChip Millennium";
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printk(KERN_NOTICE "DiskOnChip Millennium found at address 0x%lX\n",
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this->physadr);
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mtd->type = MTD_NANDFLASH;
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mtd->flags = MTD_CAP_NANDFLASH;
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mtd->size = 0;
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/* FIXME: erase size is not always 8KiB */
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mtd->erasesize = 0x2000;
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mtd->writesize = 512;
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mtd->oobsize = 16;
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mtd->owner = THIS_MODULE;
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mtd->erase = doc_erase;
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mtd->point = NULL;
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mtd->unpoint = NULL;
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mtd->read = doc_read;
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mtd->write = doc_write;
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mtd->read_oob = doc_read_oob;
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mtd->write_oob = doc_write_oob;
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mtd->sync = NULL;
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this->totlen = 0;
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this->numchips = 0;
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this->curfloor = -1;
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this->curchip = -1;
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/* Ident all the chips present. */
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DoC_ScanChips(this);
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if (!this->totlen) {
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kfree(mtd);
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iounmap(this->virtadr);
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} else {
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this->nextdoc = docmillist;
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docmillist = mtd;
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mtd->size = this->totlen;
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add_mtd_device(mtd);
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return;
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}
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}
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EXPORT_SYMBOL_GPL(DoCMil_init);
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static int doc_read (struct mtd_info *mtd, loff_t from, size_t len,
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size_t *retlen, u_char *buf)
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{
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int i, ret;
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volatile char dummy;
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unsigned char syndrome[6], eccbuf[6];
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struct DiskOnChip *this = mtd->priv;
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void __iomem *docptr = this->virtadr;
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struct Nand *mychip = &this->chips[from >> (this->chipshift)];
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/* Don't allow read past end of device */
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if (from >= this->totlen)
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return -EINVAL;
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/* Don't allow a single read to cross a 512-byte block boundary */
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if (from + len > ((from | 0x1ff) + 1))
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len = ((from | 0x1ff) + 1) - from;
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/* Find the chip which is to be used and select it */
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if (this->curfloor != mychip->floor) {
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DoC_SelectFloor(docptr, mychip->floor);
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DoC_SelectChip(docptr, mychip->chip);
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} else if (this->curchip != mychip->chip) {
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DoC_SelectChip(docptr, mychip->chip);
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}
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this->curfloor = mychip->floor;
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this->curchip = mychip->chip;
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/* issue the Read0 or Read1 command depend on which half of the page
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we are accessing. Polling the Flash Ready bit after issue 3 bytes
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address in Sequence Read Mode, see Software Requirement 11.4 item 1.*/
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DoC_Command(docptr, (from >> 8) & 1, CDSN_CTRL_WP);
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DoC_Address(docptr, 3, from, CDSN_CTRL_WP, 0x00);
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DoC_WaitReady(docptr);
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/* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/
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WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
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WriteDOC (DOC_ECC_EN, docptr, ECCConf);
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|
|
|
/* Read the data via the internal pipeline through CDSN IO register,
|
|
see Pipelined Read Operations 11.3 */
|
|
dummy = ReadDOC(docptr, ReadPipeInit);
|
|
#ifndef USE_MEMCPY
|
|
for (i = 0; i < len-1; i++) {
|
|
/* N.B. you have to increase the source address in this way or the
|
|
ECC logic will not work properly */
|
|
buf[i] = ReadDOC(docptr, Mil_CDSN_IO + (i & 0xff));
|
|
}
|
|
#else
|
|
memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len - 1);
|
|
#endif
|
|
buf[len - 1] = ReadDOC(docptr, LastDataRead);
|
|
|
|
/* Let the caller know we completed it */
|
|
*retlen = len;
|
|
ret = 0;
|
|
|
|
/* Read the ECC data from Spare Data Area,
|
|
see Reed-Solomon EDC/ECC 11.1 */
|
|
dummy = ReadDOC(docptr, ReadPipeInit);
|
|
#ifndef USE_MEMCPY
|
|
for (i = 0; i < 5; i++) {
|
|
/* N.B. you have to increase the source address in this way or the
|
|
ECC logic will not work properly */
|
|
eccbuf[i] = ReadDOC(docptr, Mil_CDSN_IO + i);
|
|
}
|
|
#else
|
|
memcpy_fromio(eccbuf, docptr + DoC_Mil_CDSN_IO, 5);
|
|
#endif
|
|
eccbuf[5] = ReadDOC(docptr, LastDataRead);
|
|
|
|
/* Flush the pipeline */
|
|
dummy = ReadDOC(docptr, ECCConf);
|
|
dummy = ReadDOC(docptr, ECCConf);
|
|
|
|
/* Check the ECC Status */
|
|
if (ReadDOC(docptr, ECCConf) & 0x80) {
|
|
int nb_errors;
|
|
/* There was an ECC error */
|
|
#ifdef ECC_DEBUG
|
|
printk("DiskOnChip ECC Error: Read at %lx\n", (long)from);
|
|
#endif
|
|
/* Read the ECC syndrom through the DiskOnChip ECC logic.
|
|
These syndrome will be all ZERO when there is no error */
|
|
for (i = 0; i < 6; i++) {
|
|
syndrome[i] = ReadDOC(docptr, ECCSyndrome0 + i);
|
|
}
|
|
nb_errors = doc_decode_ecc(buf, syndrome);
|
|
#ifdef ECC_DEBUG
|
|
printk("ECC Errors corrected: %x\n", nb_errors);
|
|
#endif
|
|
if (nb_errors < 0) {
|
|
/* We return error, but have actually done the read. Not that
|
|
this can be told to user-space, via sys_read(), but at least
|
|
MTD-aware stuff can know about it by checking *retlen */
|
|
ret = -EIO;
|
|
}
|
|
}
|
|
|
|
#ifdef PSYCHO_DEBUG
|
|
printk("ECC DATA at %lx: %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
|
|
(long)from, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3],
|
|
eccbuf[4], eccbuf[5]);
|
|
#endif
|
|
|
|
/* disable the ECC engine */
|
|
WriteDOC(DOC_ECC_DIS, docptr , ECCConf);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int doc_write (struct mtd_info *mtd, loff_t to, size_t len,
|
|
size_t *retlen, const u_char *buf)
|
|
{
|
|
int i,ret = 0;
|
|
char eccbuf[6];
|
|
volatile char dummy;
|
|
struct DiskOnChip *this = mtd->priv;
|
|
void __iomem *docptr = this->virtadr;
|
|
struct Nand *mychip = &this->chips[to >> (this->chipshift)];
|
|
|
|
/* Don't allow write past end of device */
|
|
if (to >= this->totlen)
|
|
return -EINVAL;
|
|
|
|
#if 0
|
|
/* Don't allow a single write to cross a 512-byte block boundary */
|
|
if (to + len > ( (to | 0x1ff) + 1))
|
|
len = ((to | 0x1ff) + 1) - to;
|
|
#else
|
|
/* Don't allow writes which aren't exactly one block */
|
|
if (to & 0x1ff || len != 0x200)
|
|
return -EINVAL;
|
|
#endif
|
|
|
|
/* Find the chip which is to be used and select it */
|
|
if (this->curfloor != mychip->floor) {
|
|
DoC_SelectFloor(docptr, mychip->floor);
|
|
DoC_SelectChip(docptr, mychip->chip);
|
|
} else if (this->curchip != mychip->chip) {
|
|
DoC_SelectChip(docptr, mychip->chip);
|
|
}
|
|
this->curfloor = mychip->floor;
|
|
this->curchip = mychip->chip;
|
|
|
|
/* Reset the chip, see Software Requirement 11.4 item 1. */
|
|
DoC_Command(docptr, NAND_CMD_RESET, 0x00);
|
|
DoC_WaitReady(docptr);
|
|
/* Set device to main plane of flash */
|
|
DoC_Command(docptr, NAND_CMD_READ0, 0x00);
|
|
|
|
/* issue the Serial Data In command to initial the Page Program process */
|
|
DoC_Command(docptr, NAND_CMD_SEQIN, 0x00);
|
|
DoC_Address(docptr, 3, to, 0x00, 0x00);
|
|
DoC_WaitReady(docptr);
|
|
|
|
/* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/
|
|
WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
|
|
WriteDOC (DOC_ECC_EN | DOC_ECC_RW, docptr, ECCConf);
|
|
|
|
/* Write the data via the internal pipeline through CDSN IO register,
|
|
see Pipelined Write Operations 11.2 */
|
|
#ifndef USE_MEMCPY
|
|
for (i = 0; i < len; i++) {
|
|
/* N.B. you have to increase the source address in this way or the
|
|
ECC logic will not work properly */
|
|
WriteDOC(buf[i], docptr, Mil_CDSN_IO + i);
|
|
}
|
|
#else
|
|
memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len);
|
|
#endif
|
|
WriteDOC(0x00, docptr, WritePipeTerm);
|
|
|
|
/* Write ECC data to flash, the ECC info is generated by the DiskOnChip ECC logic
|
|
see Reed-Solomon EDC/ECC 11.1 */
|
|
WriteDOC(0, docptr, NOP);
|
|
WriteDOC(0, docptr, NOP);
|
|
WriteDOC(0, docptr, NOP);
|
|
|
|
/* Read the ECC data through the DiskOnChip ECC logic */
|
|
for (i = 0; i < 6; i++) {
|
|
eccbuf[i] = ReadDOC(docptr, ECCSyndrome0 + i);
|
|
}
|
|
|
|
/* ignore the ECC engine */
|
|
WriteDOC(DOC_ECC_DIS, docptr , ECCConf);
|
|
|
|
#ifndef USE_MEMCPY
|
|
/* Write the ECC data to flash */
|
|
for (i = 0; i < 6; i++) {
|
|
/* N.B. you have to increase the source address in this way or the
|
|
ECC logic will not work properly */
|
|
WriteDOC(eccbuf[i], docptr, Mil_CDSN_IO + i);
|
|
}
|
|
#else
|
|
memcpy_toio(docptr + DoC_Mil_CDSN_IO, eccbuf, 6);
|
|
#endif
|
|
|
|
/* write the block status BLOCK_USED (0x5555) at the end of ECC data
|
|
FIXME: this is only a hack for programming the IPL area for LinuxBIOS
|
|
and should be replace with proper codes in user space utilities */
|
|
WriteDOC(0x55, docptr, Mil_CDSN_IO);
|
|
WriteDOC(0x55, docptr, Mil_CDSN_IO + 1);
|
|
|
|
WriteDOC(0x00, docptr, WritePipeTerm);
|
|
|
|
#ifdef PSYCHO_DEBUG
|
|
printk("OOB data at %lx is %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
|
|
(long) to, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3],
|
|
eccbuf[4], eccbuf[5]);
|
|
#endif
|
|
|
|
/* Commit the Page Program command and wait for ready
|
|
see Software Requirement 11.4 item 1.*/
|
|
DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00);
|
|
DoC_WaitReady(docptr);
|
|
|
|
/* Read the status of the flash device through CDSN IO register
|
|
see Software Requirement 11.4 item 5.*/
|
|
DoC_Command(docptr, NAND_CMD_STATUS, CDSN_CTRL_WP);
|
|
dummy = ReadDOC(docptr, ReadPipeInit);
|
|
DoC_Delay(docptr, 2);
|
|
if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
|
|
printk("Error programming flash\n");
|
|
/* Error in programming
|
|
FIXME: implement Bad Block Replacement (in nftl.c ??) */
|
|
*retlen = 0;
|
|
ret = -EIO;
|
|
}
|
|
dummy = ReadDOC(docptr, LastDataRead);
|
|
|
|
/* Let the caller know we completed it */
|
|
*retlen = len;
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int doc_read_oob(struct mtd_info *mtd, loff_t ofs,
|
|
struct mtd_oob_ops *ops)
|
|
{
|
|
#ifndef USE_MEMCPY
|
|
int i;
|
|
#endif
|
|
volatile char dummy;
|
|
struct DiskOnChip *this = mtd->priv;
|
|
void __iomem *docptr = this->virtadr;
|
|
struct Nand *mychip = &this->chips[ofs >> this->chipshift];
|
|
uint8_t *buf = ops->oobbuf;
|
|
size_t len = ops->len;
|
|
|
|
BUG_ON(ops->mode != MTD_OOB_PLACE);
|
|
|
|
ofs += ops->ooboffs;
|
|
|
|
/* Find the chip which is to be used and select it */
|
|
if (this->curfloor != mychip->floor) {
|
|
DoC_SelectFloor(docptr, mychip->floor);
|
|
DoC_SelectChip(docptr, mychip->chip);
|
|
} else if (this->curchip != mychip->chip) {
|
|
DoC_SelectChip(docptr, mychip->chip);
|
|
}
|
|
this->curfloor = mychip->floor;
|
|
this->curchip = mychip->chip;
|
|
|
|
/* disable the ECC engine */
|
|
WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
|
|
WriteDOC (DOC_ECC_DIS, docptr, ECCConf);
|
|
|
|
/* issue the Read2 command to set the pointer to the Spare Data Area.
|
|
Polling the Flash Ready bit after issue 3 bytes address in
|
|
Sequence Read Mode, see Software Requirement 11.4 item 1.*/
|
|
DoC_Command(docptr, NAND_CMD_READOOB, CDSN_CTRL_WP);
|
|
DoC_Address(docptr, 3, ofs, CDSN_CTRL_WP, 0x00);
|
|
DoC_WaitReady(docptr);
|
|
|
|
/* Read the data out via the internal pipeline through CDSN IO register,
|
|
see Pipelined Read Operations 11.3 */
|
|
dummy = ReadDOC(docptr, ReadPipeInit);
|
|
#ifndef USE_MEMCPY
|
|
for (i = 0; i < len-1; i++) {
|
|
/* N.B. you have to increase the source address in this way or the
|
|
ECC logic will not work properly */
|
|
buf[i] = ReadDOC(docptr, Mil_CDSN_IO + i);
|
|
}
|
|
#else
|
|
memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len - 1);
|
|
#endif
|
|
buf[len - 1] = ReadDOC(docptr, LastDataRead);
|
|
|
|
ops->retlen = len;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,
|
|
struct mtd_oob_ops *ops)
|
|
{
|
|
#ifndef USE_MEMCPY
|
|
int i;
|
|
#endif
|
|
volatile char dummy;
|
|
int ret = 0;
|
|
struct DiskOnChip *this = mtd->priv;
|
|
void __iomem *docptr = this->virtadr;
|
|
struct Nand *mychip = &this->chips[ofs >> this->chipshift];
|
|
uint8_t *buf = ops->oobbuf;
|
|
size_t len = ops->len;
|
|
|
|
BUG_ON(ops->mode != MTD_OOB_PLACE);
|
|
|
|
ofs += ops->ooboffs;
|
|
|
|
/* Find the chip which is to be used and select it */
|
|
if (this->curfloor != mychip->floor) {
|
|
DoC_SelectFloor(docptr, mychip->floor);
|
|
DoC_SelectChip(docptr, mychip->chip);
|
|
} else if (this->curchip != mychip->chip) {
|
|
DoC_SelectChip(docptr, mychip->chip);
|
|
}
|
|
this->curfloor = mychip->floor;
|
|
this->curchip = mychip->chip;
|
|
|
|
/* disable the ECC engine */
|
|
WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
|
|
WriteDOC (DOC_ECC_DIS, docptr, ECCConf);
|
|
|
|
/* Reset the chip, see Software Requirement 11.4 item 1. */
|
|
DoC_Command(docptr, NAND_CMD_RESET, CDSN_CTRL_WP);
|
|
DoC_WaitReady(docptr);
|
|
/* issue the Read2 command to set the pointer to the Spare Data Area. */
|
|
DoC_Command(docptr, NAND_CMD_READOOB, CDSN_CTRL_WP);
|
|
|
|
/* issue the Serial Data In command to initial the Page Program process */
|
|
DoC_Command(docptr, NAND_CMD_SEQIN, 0x00);
|
|
DoC_Address(docptr, 3, ofs, 0x00, 0x00);
|
|
|
|
/* Write the data via the internal pipeline through CDSN IO register,
|
|
see Pipelined Write Operations 11.2 */
|
|
#ifndef USE_MEMCPY
|
|
for (i = 0; i < len; i++) {
|
|
/* N.B. you have to increase the source address in this way or the
|
|
ECC logic will not work properly */
|
|
WriteDOC(buf[i], docptr, Mil_CDSN_IO + i);
|
|
}
|
|
#else
|
|
memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len);
|
|
#endif
|
|
WriteDOC(0x00, docptr, WritePipeTerm);
|
|
|
|
/* Commit the Page Program command and wait for ready
|
|
see Software Requirement 11.4 item 1.*/
|
|
DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00);
|
|
DoC_WaitReady(docptr);
|
|
|
|
/* Read the status of the flash device through CDSN IO register
|
|
see Software Requirement 11.4 item 5.*/
|
|
DoC_Command(docptr, NAND_CMD_STATUS, 0x00);
|
|
dummy = ReadDOC(docptr, ReadPipeInit);
|
|
DoC_Delay(docptr, 2);
|
|
if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
|
|
printk("Error programming oob data\n");
|
|
/* FIXME: implement Bad Block Replacement (in nftl.c ??) */
|
|
ops->retlen = 0;
|
|
ret = -EIO;
|
|
}
|
|
dummy = ReadDOC(docptr, LastDataRead);
|
|
|
|
ops->retlen = len;
|
|
|
|
return ret;
|
|
}
|
|
|
|
int doc_erase (struct mtd_info *mtd, struct erase_info *instr)
|
|
{
|
|
volatile char dummy;
|
|
struct DiskOnChip *this = mtd->priv;
|
|
__u32 ofs = instr->addr;
|
|
__u32 len = instr->len;
|
|
void __iomem *docptr = this->virtadr;
|
|
struct Nand *mychip = &this->chips[ofs >> this->chipshift];
|
|
|
|
if (len != mtd->erasesize)
|
|
printk(KERN_WARNING "Erase not right size (%x != %x)n",
|
|
len, mtd->erasesize);
|
|
|
|
/* Find the chip which is to be used and select it */
|
|
if (this->curfloor != mychip->floor) {
|
|
DoC_SelectFloor(docptr, mychip->floor);
|
|
DoC_SelectChip(docptr, mychip->chip);
|
|
} else if (this->curchip != mychip->chip) {
|
|
DoC_SelectChip(docptr, mychip->chip);
|
|
}
|
|
this->curfloor = mychip->floor;
|
|
this->curchip = mychip->chip;
|
|
|
|
instr->state = MTD_ERASE_PENDING;
|
|
|
|
/* issue the Erase Setup command */
|
|
DoC_Command(docptr, NAND_CMD_ERASE1, 0x00);
|
|
DoC_Address(docptr, 2, ofs, 0x00, 0x00);
|
|
|
|
/* Commit the Erase Start command and wait for ready
|
|
see Software Requirement 11.4 item 1.*/
|
|
DoC_Command(docptr, NAND_CMD_ERASE2, 0x00);
|
|
DoC_WaitReady(docptr);
|
|
|
|
instr->state = MTD_ERASING;
|
|
|
|
/* Read the status of the flash device through CDSN IO register
|
|
see Software Requirement 11.4 item 5.
|
|
FIXME: it seems that we are not wait long enough, some blocks are not
|
|
erased fully */
|
|
DoC_Command(docptr, NAND_CMD_STATUS, CDSN_CTRL_WP);
|
|
dummy = ReadDOC(docptr, ReadPipeInit);
|
|
DoC_Delay(docptr, 2);
|
|
if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
|
|
printk("Error Erasing at 0x%x\n", ofs);
|
|
/* There was an error
|
|
FIXME: implement Bad Block Replacement (in nftl.c ??) */
|
|
instr->state = MTD_ERASE_FAILED;
|
|
} else
|
|
instr->state = MTD_ERASE_DONE;
|
|
dummy = ReadDOC(docptr, LastDataRead);
|
|
|
|
mtd_erase_callback(instr);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/****************************************************************************
|
|
*
|
|
* Module stuff
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void __exit cleanup_doc2001(void)
|
|
{
|
|
struct mtd_info *mtd;
|
|
struct DiskOnChip *this;
|
|
|
|
while ((mtd=docmillist)) {
|
|
this = mtd->priv;
|
|
docmillist = this->nextdoc;
|
|
|
|
del_mtd_device(mtd);
|
|
|
|
iounmap(this->virtadr);
|
|
kfree(this->chips);
|
|
kfree(mtd);
|
|
}
|
|
}
|
|
|
|
module_exit(cleanup_doc2001);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
|
|
MODULE_DESCRIPTION("Alternative driver for DiskOnChip Millennium");
|