linux-stable/drivers/clk/meson
Igor Prusov 7ae1b0dc12 clk: meson: Add missing clocks to axg_clk_regmaps
[ Upstream commit ba535bce57 ]

Some clocks were missing from axg_clk_regmaps, which caused kernel panic
during cat /sys/kernel/debug/clk/clk_summary

[   57.349402] Unable to handle kernel NULL pointer dereference at virtual address 00000000000001fc
...
[   57.430002] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[   57.436900] pc : regmap_read+0x1c/0x88
[   57.440608] lr : clk_regmap_gate_is_enabled+0x3c/0xb0
[   57.445611] sp : ffff800082f1b690
[   57.448888] x29: ffff800082f1b690 x28: 0000000000000000 x27: ffff800080eb9a70
[   57.455961] x26: 0000000000000007 x25: 0000000000000016 x24: 0000000000000000
[   57.463033] x23: ffff800080e8b488 x22: 0000000000000015 x21: ffff00000e7e7000
[   57.470106] x20: ffff00000400ec00 x19: 0000000000000000 x18: ffffffffffffffff
[   57.477178] x17: 0000000000000000 x16: 0000000000000000 x15: ffff0000042a3000
[   57.484251] x14: 0000000000000000 x13: ffff0000042a2fec x12: 0000000005f5e100
[   57.491323] x11: abcc77118461cefd x10: 0000000000000020 x9 : ffff8000805e4b24
[   57.498396] x8 : ffff0000028063c0 x7 : ffff800082f1b710 x6 : ffff800082f1b710
[   57.505468] x5 : 00000000ffffffd0 x4 : ffff800082f1b6e0 x3 : 0000000000001000
[   57.512541] x2 : ffff800082f1b6e4 x1 : 000000000000012c x0 : 0000000000000000
[   57.519615] Call trace:
[   57.522030]  regmap_read+0x1c/0x88
[   57.525393]  clk_regmap_gate_is_enabled+0x3c/0xb0
[   57.530050]  clk_core_is_enabled+0x44/0x120
[   57.534190]  clk_summary_show_subtree+0x154/0x2f0
[   57.538847]  clk_summary_show_subtree+0x220/0x2f0
[   57.543505]  clk_summary_show_subtree+0x220/0x2f0
[   57.548162]  clk_summary_show_subtree+0x220/0x2f0
[   57.552820]  clk_summary_show_subtree+0x220/0x2f0
[   57.557477]  clk_summary_show_subtree+0x220/0x2f0
[   57.562135]  clk_summary_show_subtree+0x220/0x2f0
[   57.566792]  clk_summary_show_subtree+0x220/0x2f0
[   57.571450]  clk_summary_show+0x84/0xb8
[   57.575245]  seq_read_iter+0x1bc/0x4b8
[   57.578954]  seq_read+0x8c/0xd0
[   57.582059]  full_proxy_read+0x68/0xc8
[   57.585767]  vfs_read+0xb0/0x268
[   57.588959]  ksys_read+0x70/0x108
[   57.592236]  __arm64_sys_read+0x24/0x38
[   57.596031]  invoke_syscall+0x50/0x128
[   57.599740]  el0_svc_common.constprop.0+0x48/0xf8
[   57.604397]  do_el0_svc+0x28/0x40
[   57.607675]  el0_svc+0x34/0xb8
[   57.610694]  el0t_64_sync_handler+0x13c/0x158
[   57.615006]  el0t_64_sync+0x190/0x198
[   57.618635] Code: a9bd7bfd 910003fd a90153f3 aa0003f3 (b941fc00)
[   57.624668] ---[ end trace 0000000000000000 ]---

[jbrunet: add missing Fixes tag]
Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Link: https://lore.kernel.org/r/20240202172537.1.I64656c75d84284bc91e6126b50b33c502be7c42a@changeid
Fixes: 14ebb3154b ("clk: meson: axg: add Video Clocks")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-03-26 18:20:46 -04:00
..
Kconfig clk: meson: enable building as modules 2020-11-23 09:08:23 +01:00
Makefile clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller 2019-12-11 14:06:29 +01:00
axg-aoclk.c clk: meson: enable building as modules 2020-11-23 09:08:23 +01:00
axg-aoclk.h
axg-audio.c clk: meson: axg-audio: Don't duplicate devm_clk_get_enabled() 2022-06-15 19:22:29 -07:00
axg-audio.h clk: meson: axg_audio: add sm1 support 2019-10-08 09:29:23 +02:00
axg.c clk: meson: Add missing clocks to axg_clk_regmaps 2024-03-26 18:20:46 -04:00
axg.h clk: meson: axg: Remove MIPI enable clock gate 2021-02-09 13:32:59 +01:00
clk-cpu-dyndiv.c clk: meson: add g12a cpu dynamic divider driver 2019-08-09 12:10:03 +02:00
clk-cpu-dyndiv.h clk: meson: add g12a cpu dynamic divider driver 2019-08-09 12:10:03 +02:00
clk-dualdiv.c
clk-dualdiv.h
clk-mpll.c clk: let init callback return an error code 2019-12-23 18:53:13 -08:00
clk-mpll.h
clk-phase.c clk: meson: add sclk-ws driver 2020-08-17 15:58:02 +02:00
clk-phase.h clk: meson: add sclk-ws driver 2020-08-17 15:58:02 +02:00
clk-pll.c clk: meson: pll: switch to determine_rate for the PLL ops 2021-05-19 15:48:12 +02:00
clk-pll.h
clk-regmap.c clk: meson: regmap: switch to determine_rate for the dividers 2021-06-30 11:37:02 -07:00
clk-regmap.h clk: define to_clk_regmap() as inline function 2020-10-28 16:34:44 -07:00
g12a-aoclk.c clk: meson: enable building as modules 2020-11-23 09:08:23 +01:00
g12a-aoclk.h
g12a.c clk: meson: g12a: Add missing NNA source clocks for g12b 2021-06-09 21:39:50 +02:00
g12a.h clk: meson: g12a: add MIPI DSI Host Pixel Clock 2020-11-26 15:25:20 +01:00
gxbb-aoclk.c clk: meson: enable building as modules 2020-11-23 09:08:23 +01:00
gxbb-aoclk.h
gxbb.c clk: meson: gxbb: Fix the SDM_EN bit for MPLL0 on GXBB 2021-11-30 10:28:52 +01:00
gxbb.h clk: meson: gxbb: add the gxl internal dac gate 2020-02-13 17:26:04 +01:00
meson-aoclk.c clk: meson: Hold reference returned by of_get_parent() 2022-08-19 14:29:00 -07:00
meson-aoclk.h clk: meson: remove ao input bypass clocks 2019-07-29 12:42:48 +02:00
meson-eeclk.c clk: meson: Hold reference returned by of_get_parent() 2022-08-19 14:29:00 -07:00
meson-eeclk.h clk: meson: remove ee input bypass clocks 2019-07-29 12:42:49 +02:00
meson8-ddr.c clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller 2019-12-11 14:06:29 +01:00
meson8b.c clk: meson: Hold reference returned by of_get_parent() 2022-08-19 14:29:00 -07:00
meson8b.h clk: meson: meson8b: Initialize the HDMI PLL registers 2021-09-23 11:46:37 +02:00
parm.h
sclk-div.c clk: let init callback return an error code 2019-12-23 18:53:13 -08:00
sclk-div.h
vid-pll-div.c
vid-pll-div.h