Geert Uytterhoeven 5342ad8db5 clk: renesas: r8a779f0: Correct PFC/GPIO parent clock ... [ Upstream commit d1b32a83a0 ] According to the R-Car S4 Series Hardware User’s Manual Rev.0.81, the parent clock of the Pin Function (PFC/GPIO) module clock is the CP clock. As this clock is not documented to exist on R-Car S4, use the CPEX clock instead. Fixes: 73421f2a48 ("clk: renesas: r8a779f0: Add PFC clock") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/f88ec4aede0eaf0107c8bb7b28ba719ac6cd418f.1706197415.git.geert+renesas@glider.be Signed-off-by: Sasha Levin <sashal@kernel.org>		2024-03-26 18:20:48 -04:00
..
clk-div6.c
clk-div6.h
clk-emev2.c
clk-mstp.c
clk-r8a73a4.c	clk: renesas: r8a73a4: Remove r8a73a4_cpg.reg	2022-06-13 11:53:18 +02:00
clk-r8a7740.c	clk: renesas: r8a7740: Remove r8a7740_cpg.reg	2022-06-13 11:53:18 +02:00
clk-r8a7778.c	clk: renesas: r8a7778: Remove struct r8a7778_cpg	2022-06-13 11:53:18 +02:00
clk-r8a7779.c	clk: renesas: r8a7779: Remove struct r8a7779_cpg	2022-06-13 11:53:18 +02:00
clk-rz.c	clk: renesas: rza1: Remove struct rz_cpg	2022-06-13 11:53:18 +02:00
clk-sh73a0.c	clk: renesas: sh73a0: Remove sh73a0_cpg.reg	2022-06-13 11:53:18 +02:00
Kconfig	clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*	2023-03-17 08:50:30 +01:00
Makefile	clk: renesas: Add RZ/V2M support using the rzg2l driver	2022-05-06 09:38:40 +02:00
r7s9210-cpg-mssr.c
r8a774a1-cpg-mssr.c	clk: renesas: Move RPC core clocks	2022-04-13 12:27:45 +02:00
r8a774b1-cpg-mssr.c	clk: renesas: Move RPC core clocks	2022-04-13 12:27:45 +02:00
r8a774c0-cpg-mssr.c	clk: renesas: Move RPC core clocks	2022-04-13 12:27:45 +02:00
r8a774e1-cpg-mssr.c	clk: renesas: Move RPC core clocks	2022-04-13 12:27:45 +02:00
r8a779a0-cpg-mssr.c	clk: renesas: r8a779a0: Fix SD0H clock name	2022-12-31 13:32:05 +01:00
r8a779f0-cpg-mssr.c	clk: renesas: r8a779f0: Correct PFC/GPIO parent clock	2024-03-26 18:20:48 -04:00
r8a779g0-cpg-mssr.c	clk: renesas: r8a779g0: Correct PFC/GPIO parent clocks	2024-03-26 18:20:48 -04:00
r8a7742-cpg-mssr.c
r8a7743-cpg-mssr.c
r8a7745-cpg-mssr.c
r8a7790-cpg-mssr.c
r8a7791-cpg-mssr.c
r8a7792-cpg-mssr.c
r8a7794-cpg-mssr.c
r8a7795-cpg-mssr.c	clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*	2023-03-17 08:50:30 +01:00
r8a7796-cpg-mssr.c	clk: renesas: Move RPC core clocks	2022-04-13 12:27:45 +02:00
r8a77470-cpg-mssr.c
r8a77965-cpg-mssr.c	clk: renesas: Move RPC core clocks	2022-04-13 12:27:45 +02:00
r8a77970-cpg-mssr.c
r8a77980-cpg-mssr.c	clk: renesas: Move RPC core clocks	2022-04-13 12:27:45 +02:00
r8a77990-cpg-mssr.c	clk: renesas: Move RPC core clocks	2022-04-13 12:27:45 +02:00
r8a77995-cpg-mssr.c	clk: renesas: Move RPC core clocks	2022-04-13 12:27:45 +02:00
r9a06g032-clocks.c	clk: renesas: r9a06g032: Repair grave increment error	2022-12-31 13:32:06 +01:00
r9a07g043-cpg.c	clk: renesas: r9a07g043: Add support for RZ/Five SoC	2022-07-05 09:20:34 +02:00
r9a07g044-cpg.c	clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_info	2022-08-22 09:47:36 +02:00
r9a09g011-cpg.c	clk: renesas: r9a09g011: Add IIC clock and reset entries	2022-08-29 09:22:57 +02:00
rcar-cpg-lib.c	clk: renesas: rcar-gen3: Extend SDnH divider table	2023-11-20 11:51:56 +01:00
rcar-cpg-lib.h	clk: renesas: rcar-gen3: Switch to new SD clock handling	2021-11-19 11:32:39 +01:00
rcar-gen2-cpg.c
rcar-gen2-cpg.h
rcar-gen3-cpg.c	clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*	2023-03-17 08:50:30 +01:00
rcar-gen3-cpg.h	clk: renesas: r8a77995: Add RPC clocks	2022-04-11 12:13:13 +02:00
rcar-gen4-cpg.c	clk: renesas: rcar-gen4: Fix initconst confusion for cpg_pll_config	2022-07-05 09:20:34 +02:00
rcar-gen4-cpg.h	clk: renesas: rcar-gen4: Add CLK_TYPE_GEN4_PLL4	2022-04-29 12:08:36 +02:00
rcar-usb2-clock-sel.c
renesas-cpg-mssr.c	clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*	2023-03-17 08:50:30 +01:00
renesas-cpg-mssr.h	clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*	2023-03-17 08:50:30 +01:00
rzg2l-cpg.c	clk: renesas: rzg2l: Check reset monitor registers	2024-01-25 15:27:35 -08:00
rzg2l-cpg.h	clk: renesas: rzg2l: Lock around writes to mux register	2023-11-20 11:51:56 +01:00