Sumit Gupta 7d6370223d soc/tegra: cbb: Check firewall before enabling error reporting ... [ Upstream commit 2927cf85f4 ] To enable error reporting for a fabric to CCPLEX, we need to write its register for enabling error interrupt to CCPLEX during boot and later clear the error status register after error occurs. If a fabric's registers are protected and not accessible from CCPLEX, then accessing the registers will cause CBB firewall error. Add support to check whether write access from CCPLEX to the registers of a fabric is not blocked by it's firewall before enabling error reporting to CCPLEX for that fabric. Fixes: fc2f151d23 ("soc/tegra: cbb: Add driver for Tegra234 CBB 2.0") Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Sasha Levin <sashal@kernel.org>		2022-12-31 13:31:50 +01:00
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cbb	soc/tegra: cbb: Check firewall before enabling error reporting	2022-12-31 13:31:50 +01:00
fuse	soc/tegra: cbb: Changes for v6.1-rc1	2022-09-23 18:04:29 +02:00
ari-tegra186.c
common.c	soc/tegra: Migrate to dev_pm_opp_set_config()	2022-07-08 11:27:33 +05:30
flowctrl.c
Kconfig	soc/tegra: cbb: Changes for v6.1-rc1	2022-09-23 18:04:29 +02:00
Makefile	soc/tegra: cbb: Add CBB 1.0 driver for Tegra194	2022-09-15 12:41:36 +02:00
pmc.c	soc/tegra: pmc: Check device node status property	2022-09-15 14:10:49 +02:00
powergate-bpmp.c
regulators-tegra20.c
regulators-tegra30.c