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cdeee49f3e
The offsets for almost all GSI registers we use have different offsets starting at IPA version 4.5. Only two registers remain in their original location. In a way though, the new register locations are not *that* different. The entire group of affected registers has simply been shifted down in memory by a fixed amount (0xd000). So for example, the channel context 0 register that has a base offset of 0x0001c000 for "older" hardware now has a base offset of 0x0000f000. This patch aims to add support for IPA v4.5 registers at their new offets in a way that minimizes the amount of code that needs to change. It is not ideal, but it avoids the need to maintain a nearly complete set of additional register offset definitions. The approach takes advantage of the fact that when accessing GSI registers we do not access any of memory at lower end of the "gsi" memory range (with two exceptions already noted). In particular, we do not access anything within the bottom 0xd000 bytes of the GSI memory range. For IPA version 4.5, after we map the GSI memory, we adjust the virtual memory pointer downward by the fixed amount (0xd000). That way, register accesses using the offsets defined by the existing GSI_REG_*() macros will resolve to the proper locations for IPA version 4.5. The two registers *not* affected by this offset are accessed only in gsi_irq_setup(). There, for IPA version 4.5, we undo the general register adjustment by adding the fixed amount back to the virtual address to access these registers. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org> |
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