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![Robin Murphy](/assets/img/avatar_default.png)
The core code bakes its own cookies now. Acked-by: Chunyan Zhang <zhang.lyra@gmail.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/4e7fc6e523cb4b63fb13f5be10041eb24c0dcb1e.1628682048.git.robin.murphy@arm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
568 lines
14 KiB
C
568 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Unisoc IOMMU driver
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*
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* Copyright (C) 2020 Unisoc, Inc.
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* Author: Chunyan Zhang <chunyan.zhang@unisoc.com>
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*/
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/errno.h>
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#include <linux/iommu.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#define SPRD_IOMMU_PAGE_SHIFT 12
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#define SPRD_IOMMU_PAGE_SIZE SZ_4K
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#define SPRD_EX_CFG 0x0
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#define SPRD_IOMMU_VAOR_BYPASS BIT(4)
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#define SPRD_IOMMU_GATE_EN BIT(1)
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#define SPRD_IOMMU_EN BIT(0)
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#define SPRD_EX_UPDATE 0x4
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#define SPRD_EX_FIRST_VPN 0x8
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#define SPRD_EX_VPN_RANGE 0xc
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#define SPRD_EX_FIRST_PPN 0x10
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#define SPRD_EX_DEFAULT_PPN 0x14
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#define SPRD_IOMMU_VERSION 0x0
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#define SPRD_VERSION_MASK GENMASK(15, 8)
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#define SPRD_VERSION_SHIFT 0x8
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#define SPRD_VAU_CFG 0x4
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#define SPRD_VAU_UPDATE 0x8
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#define SPRD_VAU_AUTH_CFG 0xc
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#define SPRD_VAU_FIRST_PPN 0x10
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#define SPRD_VAU_DEFAULT_PPN_RD 0x14
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#define SPRD_VAU_DEFAULT_PPN_WR 0x18
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#define SPRD_VAU_FIRST_VPN 0x1c
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#define SPRD_VAU_VPN_RANGE 0x20
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enum sprd_iommu_version {
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SPRD_IOMMU_EX,
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SPRD_IOMMU_VAU,
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};
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/*
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* struct sprd_iommu_device - high-level sprd IOMMU device representation,
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* including hardware information and configuration, also driver data, etc
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*
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* @ver: sprd IOMMU IP version
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* @prot_page_va: protect page base virtual address
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* @prot_page_pa: protect page base physical address, data would be
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* written to here while translation fault
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* @base: mapped base address for accessing registers
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* @dev: pointer to basic device structure
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* @iommu: IOMMU core representation
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* @group: IOMMU group
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* @eb: gate clock which controls IOMMU access
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*/
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struct sprd_iommu_device {
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enum sprd_iommu_version ver;
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u32 *prot_page_va;
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dma_addr_t prot_page_pa;
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void __iomem *base;
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struct device *dev;
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struct iommu_device iommu;
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struct iommu_group *group;
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struct clk *eb;
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};
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struct sprd_iommu_domain {
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spinlock_t pgtlock; /* lock for page table */
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struct iommu_domain domain;
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u32 *pgt_va; /* page table virtual address base */
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dma_addr_t pgt_pa; /* page table physical address base */
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struct sprd_iommu_device *sdev;
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};
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static const struct iommu_ops sprd_iommu_ops;
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static struct sprd_iommu_domain *to_sprd_domain(struct iommu_domain *dom)
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{
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return container_of(dom, struct sprd_iommu_domain, domain);
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}
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static inline void
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sprd_iommu_write(struct sprd_iommu_device *sdev, unsigned int reg, u32 val)
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{
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writel_relaxed(val, sdev->base + reg);
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}
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static inline u32
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sprd_iommu_read(struct sprd_iommu_device *sdev, unsigned int reg)
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{
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return readl_relaxed(sdev->base + reg);
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}
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static inline void
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sprd_iommu_update_bits(struct sprd_iommu_device *sdev, unsigned int reg,
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u32 mask, u32 shift, u32 val)
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{
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u32 t = sprd_iommu_read(sdev, reg);
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t = (t & (~(mask << shift))) | ((val & mask) << shift);
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sprd_iommu_write(sdev, reg, t);
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}
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static inline int
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sprd_iommu_get_version(struct sprd_iommu_device *sdev)
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{
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int ver = (sprd_iommu_read(sdev, SPRD_IOMMU_VERSION) &
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SPRD_VERSION_MASK) >> SPRD_VERSION_SHIFT;
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switch (ver) {
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case SPRD_IOMMU_EX:
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case SPRD_IOMMU_VAU:
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return ver;
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default:
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return -EINVAL;
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}
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}
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static size_t
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sprd_iommu_pgt_size(struct iommu_domain *domain)
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{
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return ((domain->geometry.aperture_end -
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domain->geometry.aperture_start + 1) >>
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SPRD_IOMMU_PAGE_SHIFT) * sizeof(u32);
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}
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static struct iommu_domain *sprd_iommu_domain_alloc(unsigned int domain_type)
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{
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struct sprd_iommu_domain *dom;
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if (domain_type != IOMMU_DOMAIN_DMA && domain_type != IOMMU_DOMAIN_UNMANAGED)
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return NULL;
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dom = kzalloc(sizeof(*dom), GFP_KERNEL);
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if (!dom)
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return NULL;
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spin_lock_init(&dom->pgtlock);
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dom->domain.geometry.aperture_start = 0;
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dom->domain.geometry.aperture_end = SZ_256M - 1;
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return &dom->domain;
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}
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static void sprd_iommu_domain_free(struct iommu_domain *domain)
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{
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struct sprd_iommu_domain *dom = to_sprd_domain(domain);
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kfree(dom);
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}
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static void sprd_iommu_first_vpn(struct sprd_iommu_domain *dom)
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{
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struct sprd_iommu_device *sdev = dom->sdev;
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u32 val;
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unsigned int reg;
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if (sdev->ver == SPRD_IOMMU_EX)
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reg = SPRD_EX_FIRST_VPN;
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else
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reg = SPRD_VAU_FIRST_VPN;
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val = dom->domain.geometry.aperture_start >> SPRD_IOMMU_PAGE_SHIFT;
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sprd_iommu_write(sdev, reg, val);
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}
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static void sprd_iommu_vpn_range(struct sprd_iommu_domain *dom)
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{
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struct sprd_iommu_device *sdev = dom->sdev;
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u32 val;
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unsigned int reg;
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if (sdev->ver == SPRD_IOMMU_EX)
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reg = SPRD_EX_VPN_RANGE;
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else
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reg = SPRD_VAU_VPN_RANGE;
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val = (dom->domain.geometry.aperture_end -
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dom->domain.geometry.aperture_start) >> SPRD_IOMMU_PAGE_SHIFT;
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sprd_iommu_write(sdev, reg, val);
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}
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static void sprd_iommu_first_ppn(struct sprd_iommu_domain *dom)
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{
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u32 val = dom->pgt_pa >> SPRD_IOMMU_PAGE_SHIFT;
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struct sprd_iommu_device *sdev = dom->sdev;
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unsigned int reg;
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if (sdev->ver == SPRD_IOMMU_EX)
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reg = SPRD_EX_FIRST_PPN;
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else
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reg = SPRD_VAU_FIRST_PPN;
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sprd_iommu_write(sdev, reg, val);
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}
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static void sprd_iommu_default_ppn(struct sprd_iommu_device *sdev)
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{
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u32 val = sdev->prot_page_pa >> SPRD_IOMMU_PAGE_SHIFT;
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if (sdev->ver == SPRD_IOMMU_EX) {
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sprd_iommu_write(sdev, SPRD_EX_DEFAULT_PPN, val);
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} else if (sdev->ver == SPRD_IOMMU_VAU) {
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sprd_iommu_write(sdev, SPRD_VAU_DEFAULT_PPN_RD, val);
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sprd_iommu_write(sdev, SPRD_VAU_DEFAULT_PPN_WR, val);
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}
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}
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static void sprd_iommu_hw_en(struct sprd_iommu_device *sdev, bool en)
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{
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unsigned int reg_cfg;
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u32 mask, val;
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if (sdev->ver == SPRD_IOMMU_EX)
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reg_cfg = SPRD_EX_CFG;
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else
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reg_cfg = SPRD_VAU_CFG;
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mask = SPRD_IOMMU_EN | SPRD_IOMMU_GATE_EN;
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val = en ? mask : 0;
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sprd_iommu_update_bits(sdev, reg_cfg, mask, 0, val);
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}
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static int sprd_iommu_attach_device(struct iommu_domain *domain,
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struct device *dev)
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{
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struct sprd_iommu_device *sdev = dev_iommu_priv_get(dev);
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struct sprd_iommu_domain *dom = to_sprd_domain(domain);
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size_t pgt_size = sprd_iommu_pgt_size(domain);
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if (dom->sdev) {
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pr_err("There's already a device attached to this domain.\n");
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return -EINVAL;
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}
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dom->pgt_va = dma_alloc_coherent(sdev->dev, pgt_size, &dom->pgt_pa, GFP_KERNEL);
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if (!dom->pgt_va)
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return -ENOMEM;
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dom->sdev = sdev;
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sprd_iommu_first_ppn(dom);
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sprd_iommu_first_vpn(dom);
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sprd_iommu_vpn_range(dom);
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sprd_iommu_default_ppn(sdev);
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sprd_iommu_hw_en(sdev, true);
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return 0;
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}
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static void sprd_iommu_detach_device(struct iommu_domain *domain,
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struct device *dev)
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{
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struct sprd_iommu_domain *dom = to_sprd_domain(domain);
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struct sprd_iommu_device *sdev = dom->sdev;
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size_t pgt_size = sprd_iommu_pgt_size(domain);
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if (!sdev)
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return;
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dma_free_coherent(sdev->dev, pgt_size, dom->pgt_va, dom->pgt_pa);
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sprd_iommu_hw_en(sdev, false);
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dom->sdev = NULL;
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}
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static int sprd_iommu_map(struct iommu_domain *domain, unsigned long iova,
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phys_addr_t paddr, size_t size, int prot, gfp_t gfp)
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{
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struct sprd_iommu_domain *dom = to_sprd_domain(domain);
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unsigned int page_num = size >> SPRD_IOMMU_PAGE_SHIFT;
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unsigned long flags;
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unsigned int i;
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u32 *pgt_base_iova;
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u32 pabase = (u32)paddr;
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unsigned long start = domain->geometry.aperture_start;
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unsigned long end = domain->geometry.aperture_end;
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if (!dom->sdev) {
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pr_err("No sprd_iommu_device attached to the domain\n");
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return -EINVAL;
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}
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if (iova < start || (iova + size) > (end + 1)) {
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dev_err(dom->sdev->dev, "(iova(0x%lx) + size(%zx)) are not in the range!\n",
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iova, size);
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return -EINVAL;
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}
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pgt_base_iova = dom->pgt_va + ((iova - start) >> SPRD_IOMMU_PAGE_SHIFT);
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spin_lock_irqsave(&dom->pgtlock, flags);
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for (i = 0; i < page_num; i++) {
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pgt_base_iova[i] = pabase >> SPRD_IOMMU_PAGE_SHIFT;
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pabase += SPRD_IOMMU_PAGE_SIZE;
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}
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spin_unlock_irqrestore(&dom->pgtlock, flags);
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return 0;
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}
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static size_t sprd_iommu_unmap(struct iommu_domain *domain, unsigned long iova,
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size_t size, struct iommu_iotlb_gather *iotlb_gather)
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{
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struct sprd_iommu_domain *dom = to_sprd_domain(domain);
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unsigned long flags;
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u32 *pgt_base_iova;
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unsigned int page_num = size >> SPRD_IOMMU_PAGE_SHIFT;
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unsigned long start = domain->geometry.aperture_start;
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unsigned long end = domain->geometry.aperture_end;
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if (iova < start || (iova + size) > (end + 1))
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return -EINVAL;
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pgt_base_iova = dom->pgt_va + ((iova - start) >> SPRD_IOMMU_PAGE_SHIFT);
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spin_lock_irqsave(&dom->pgtlock, flags);
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memset(pgt_base_iova, 0, page_num * sizeof(u32));
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spin_unlock_irqrestore(&dom->pgtlock, flags);
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return 0;
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}
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static void sprd_iommu_sync_map(struct iommu_domain *domain,
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unsigned long iova, size_t size)
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{
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struct sprd_iommu_domain *dom = to_sprd_domain(domain);
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unsigned int reg;
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if (dom->sdev->ver == SPRD_IOMMU_EX)
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reg = SPRD_EX_UPDATE;
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else
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reg = SPRD_VAU_UPDATE;
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/* clear IOMMU TLB buffer after page table updated */
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sprd_iommu_write(dom->sdev, reg, 0xffffffff);
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}
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static void sprd_iommu_sync(struct iommu_domain *domain,
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struct iommu_iotlb_gather *iotlb_gather)
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{
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sprd_iommu_sync_map(domain, 0, 0);
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}
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static phys_addr_t sprd_iommu_iova_to_phys(struct iommu_domain *domain,
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dma_addr_t iova)
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{
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struct sprd_iommu_domain *dom = to_sprd_domain(domain);
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unsigned long flags;
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phys_addr_t pa;
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unsigned long start = domain->geometry.aperture_start;
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unsigned long end = domain->geometry.aperture_end;
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if (WARN_ON(iova < start || iova > end))
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return 0;
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spin_lock_irqsave(&dom->pgtlock, flags);
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pa = *(dom->pgt_va + ((iova - start) >> SPRD_IOMMU_PAGE_SHIFT));
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pa = (pa << SPRD_IOMMU_PAGE_SHIFT) + ((iova - start) & (SPRD_IOMMU_PAGE_SIZE - 1));
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spin_unlock_irqrestore(&dom->pgtlock, flags);
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return pa;
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}
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static struct iommu_device *sprd_iommu_probe_device(struct device *dev)
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{
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struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
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struct sprd_iommu_device *sdev;
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if (!fwspec || fwspec->ops != &sprd_iommu_ops)
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return ERR_PTR(-ENODEV);
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sdev = dev_iommu_priv_get(dev);
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return &sdev->iommu;
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}
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static void sprd_iommu_release_device(struct device *dev)
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{
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struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
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if (!fwspec || fwspec->ops != &sprd_iommu_ops)
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return;
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iommu_fwspec_free(dev);
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}
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static struct iommu_group *sprd_iommu_device_group(struct device *dev)
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{
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struct sprd_iommu_device *sdev = dev_iommu_priv_get(dev);
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return iommu_group_ref_get(sdev->group);
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}
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static int sprd_iommu_of_xlate(struct device *dev, struct of_phandle_args *args)
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{
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struct platform_device *pdev;
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if (!dev_iommu_priv_get(dev)) {
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pdev = of_find_device_by_node(args->np);
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dev_iommu_priv_set(dev, platform_get_drvdata(pdev));
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platform_device_put(pdev);
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}
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return 0;
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}
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static const struct iommu_ops sprd_iommu_ops = {
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.domain_alloc = sprd_iommu_domain_alloc,
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.domain_free = sprd_iommu_domain_free,
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.attach_dev = sprd_iommu_attach_device,
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.detach_dev = sprd_iommu_detach_device,
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.map = sprd_iommu_map,
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.unmap = sprd_iommu_unmap,
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.iotlb_sync_map = sprd_iommu_sync_map,
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.iotlb_sync = sprd_iommu_sync,
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.iova_to_phys = sprd_iommu_iova_to_phys,
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.probe_device = sprd_iommu_probe_device,
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.release_device = sprd_iommu_release_device,
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.device_group = sprd_iommu_device_group,
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.of_xlate = sprd_iommu_of_xlate,
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.pgsize_bitmap = ~0UL << SPRD_IOMMU_PAGE_SHIFT,
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.owner = THIS_MODULE,
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};
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static const struct of_device_id sprd_iommu_of_match[] = {
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{ .compatible = "sprd,iommu-v1" },
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{ },
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};
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MODULE_DEVICE_TABLE(of, sprd_iommu_of_match);
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/*
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* Clock is not required, access to some of IOMMUs is controlled by gate
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* clk, enabled clocks for that kind of IOMMUs before accessing.
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* Return 0 for success or no clocks found.
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*/
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static int sprd_iommu_clk_enable(struct sprd_iommu_device *sdev)
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{
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struct clk *eb;
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eb = devm_clk_get_optional(sdev->dev, NULL);
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if (!eb)
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return 0;
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if (IS_ERR(eb))
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return PTR_ERR(eb);
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sdev->eb = eb;
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return clk_prepare_enable(eb);
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}
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static void sprd_iommu_clk_disable(struct sprd_iommu_device *sdev)
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{
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if (sdev->eb)
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clk_disable_unprepare(sdev->eb);
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}
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static int sprd_iommu_probe(struct platform_device *pdev)
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{
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struct sprd_iommu_device *sdev;
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struct device *dev = &pdev->dev;
|
|
void __iomem *base;
|
|
int ret;
|
|
|
|
sdev = devm_kzalloc(dev, sizeof(*sdev), GFP_KERNEL);
|
|
if (!sdev)
|
|
return -ENOMEM;
|
|
|
|
base = devm_platform_ioremap_resource(pdev, 0);
|
|
if (IS_ERR(base)) {
|
|
dev_err(dev, "Failed to get ioremap resource.\n");
|
|
return PTR_ERR(base);
|
|
}
|
|
sdev->base = base;
|
|
|
|
sdev->prot_page_va = dma_alloc_coherent(dev, SPRD_IOMMU_PAGE_SIZE,
|
|
&sdev->prot_page_pa, GFP_KERNEL);
|
|
if (!sdev->prot_page_va)
|
|
return -ENOMEM;
|
|
|
|
platform_set_drvdata(pdev, sdev);
|
|
sdev->dev = dev;
|
|
|
|
/* All the client devices are in the same iommu-group */
|
|
sdev->group = iommu_group_alloc();
|
|
if (IS_ERR(sdev->group)) {
|
|
ret = PTR_ERR(sdev->group);
|
|
goto free_page;
|
|
}
|
|
|
|
ret = iommu_device_sysfs_add(&sdev->iommu, dev, NULL, dev_name(dev));
|
|
if (ret)
|
|
goto put_group;
|
|
|
|
ret = iommu_device_register(&sdev->iommu, &sprd_iommu_ops, dev);
|
|
if (ret)
|
|
goto remove_sysfs;
|
|
|
|
if (!iommu_present(&platform_bus_type))
|
|
bus_set_iommu(&platform_bus_type, &sprd_iommu_ops);
|
|
|
|
ret = sprd_iommu_clk_enable(sdev);
|
|
if (ret)
|
|
goto unregister_iommu;
|
|
|
|
ret = sprd_iommu_get_version(sdev);
|
|
if (ret < 0) {
|
|
dev_err(dev, "IOMMU version(%d) is invalid.\n", ret);
|
|
goto disable_clk;
|
|
}
|
|
sdev->ver = ret;
|
|
|
|
return 0;
|
|
|
|
disable_clk:
|
|
sprd_iommu_clk_disable(sdev);
|
|
unregister_iommu:
|
|
iommu_device_unregister(&sdev->iommu);
|
|
remove_sysfs:
|
|
iommu_device_sysfs_remove(&sdev->iommu);
|
|
put_group:
|
|
iommu_group_put(sdev->group);
|
|
free_page:
|
|
dma_free_coherent(sdev->dev, SPRD_IOMMU_PAGE_SIZE, sdev->prot_page_va, sdev->prot_page_pa);
|
|
return ret;
|
|
}
|
|
|
|
static int sprd_iommu_remove(struct platform_device *pdev)
|
|
{
|
|
struct sprd_iommu_device *sdev = platform_get_drvdata(pdev);
|
|
|
|
dma_free_coherent(sdev->dev, SPRD_IOMMU_PAGE_SIZE, sdev->prot_page_va, sdev->prot_page_pa);
|
|
|
|
iommu_group_put(sdev->group);
|
|
sdev->group = NULL;
|
|
|
|
bus_set_iommu(&platform_bus_type, NULL);
|
|
|
|
platform_set_drvdata(pdev, NULL);
|
|
iommu_device_sysfs_remove(&sdev->iommu);
|
|
iommu_device_unregister(&sdev->iommu);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver sprd_iommu_driver = {
|
|
.driver = {
|
|
.name = "sprd-iommu",
|
|
.of_match_table = sprd_iommu_of_match,
|
|
.suppress_bind_attrs = true,
|
|
},
|
|
.probe = sprd_iommu_probe,
|
|
.remove = sprd_iommu_remove,
|
|
};
|
|
module_platform_driver(sprd_iommu_driver);
|
|
|
|
MODULE_DESCRIPTION("IOMMU driver for Unisoc SoCs");
|
|
MODULE_ALIAS("platform:sprd-iommu");
|
|
MODULE_LICENSE("GPL");
|