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![Suman Anna](/assets/img/avatar_default.png)
HwSpinlock IP is present only on OMAP4 and other newer SoCs, which are all device-tree boot only. This patch adds the base support for parsing the DT nodes, and removes the code dealing with the traditional platform device instantiation. Signed-off-by: Suman Anna <s-anna@ti.com> [tony@atomide.com: ack for legacy file removal] Acked-by: Tony Lindgren <tony@atomide.com> [comment on the imperfect always-zero base_id] Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
212 lines
5.4 KiB
C
212 lines
5.4 KiB
C
/*
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* OMAP hardware spinlock driver
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*
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* Copyright (C) 2010-2015 Texas Instruments Incorporated - http://www.ti.com
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*
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* Contact: Simon Que <sque@ti.com>
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* Hari Kanigeri <h-kanigeri2@ti.com>
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* Ohad Ben-Cohen <ohad@wizery.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/bitops.h>
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/hwspinlock.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include "hwspinlock_internal.h"
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/* Spinlock register offsets */
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#define SYSSTATUS_OFFSET 0x0014
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#define LOCK_BASE_OFFSET 0x0800
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#define SPINLOCK_NUMLOCKS_BIT_OFFSET (24)
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/* Possible values of SPINLOCK_LOCK_REG */
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#define SPINLOCK_NOTTAKEN (0) /* free */
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#define SPINLOCK_TAKEN (1) /* locked */
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static int omap_hwspinlock_trylock(struct hwspinlock *lock)
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{
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void __iomem *lock_addr = lock->priv;
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/* attempt to acquire the lock by reading its value */
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return (SPINLOCK_NOTTAKEN == readl(lock_addr));
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}
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static void omap_hwspinlock_unlock(struct hwspinlock *lock)
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{
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void __iomem *lock_addr = lock->priv;
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/* release the lock by writing 0 to it */
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writel(SPINLOCK_NOTTAKEN, lock_addr);
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}
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/*
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* relax the OMAP interconnect while spinning on it.
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*
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* The specs recommended that the retry delay time will be
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* just over half of the time that a requester would be
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* expected to hold the lock.
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*
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* The number below is taken from an hardware specs example,
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* obviously it is somewhat arbitrary.
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*/
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static void omap_hwspinlock_relax(struct hwspinlock *lock)
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{
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ndelay(50);
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}
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static const struct hwspinlock_ops omap_hwspinlock_ops = {
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.trylock = omap_hwspinlock_trylock,
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.unlock = omap_hwspinlock_unlock,
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.relax = omap_hwspinlock_relax,
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};
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static int omap_hwspinlock_probe(struct platform_device *pdev)
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{
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struct device_node *node = pdev->dev.of_node;
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struct hwspinlock_device *bank;
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struct hwspinlock *hwlock;
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struct resource *res;
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void __iomem *io_base;
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int num_locks, i, ret;
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/* Only a single hwspinlock block device is supported */
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int base_id = 0;
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if (!node)
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return -ENODEV;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -ENODEV;
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io_base = ioremap(res->start, resource_size(res));
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if (!io_base)
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return -ENOMEM;
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/*
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* make sure the module is enabled and clocked before reading
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* the module SYSSTATUS register
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*/
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pm_runtime_enable(&pdev->dev);
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ret = pm_runtime_get_sync(&pdev->dev);
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if (ret < 0) {
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pm_runtime_put_noidle(&pdev->dev);
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goto iounmap_base;
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}
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/* Determine number of locks */
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i = readl(io_base + SYSSTATUS_OFFSET);
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i >>= SPINLOCK_NUMLOCKS_BIT_OFFSET;
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/*
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* runtime PM will make sure the clock of this module is
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* enabled again iff at least one lock is requested
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*/
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ret = pm_runtime_put(&pdev->dev);
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if (ret < 0)
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goto iounmap_base;
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/* one of the four lsb's must be set, and nothing else */
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if (hweight_long(i & 0xf) != 1 || i > 8) {
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ret = -EINVAL;
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goto iounmap_base;
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}
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num_locks = i * 32; /* actual number of locks in this device */
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bank = kzalloc(sizeof(*bank) + num_locks * sizeof(*hwlock), GFP_KERNEL);
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if (!bank) {
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ret = -ENOMEM;
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goto iounmap_base;
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}
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platform_set_drvdata(pdev, bank);
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for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++)
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hwlock->priv = io_base + LOCK_BASE_OFFSET + sizeof(u32) * i;
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ret = hwspin_lock_register(bank, &pdev->dev, &omap_hwspinlock_ops,
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base_id, num_locks);
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if (ret)
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goto reg_fail;
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return 0;
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reg_fail:
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kfree(bank);
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iounmap_base:
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pm_runtime_disable(&pdev->dev);
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iounmap(io_base);
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return ret;
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}
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static int omap_hwspinlock_remove(struct platform_device *pdev)
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{
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struct hwspinlock_device *bank = platform_get_drvdata(pdev);
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void __iomem *io_base = bank->lock[0].priv - LOCK_BASE_OFFSET;
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int ret;
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ret = hwspin_lock_unregister(bank);
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if (ret) {
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dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret);
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return ret;
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}
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pm_runtime_disable(&pdev->dev);
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iounmap(io_base);
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kfree(bank);
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return 0;
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}
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static const struct of_device_id omap_hwspinlock_of_match[] = {
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{ .compatible = "ti,omap4-hwspinlock", },
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{ /* end */ },
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};
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MODULE_DEVICE_TABLE(of, omap_hwspinlock_of_match);
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static struct platform_driver omap_hwspinlock_driver = {
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.probe = omap_hwspinlock_probe,
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.remove = omap_hwspinlock_remove,
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.driver = {
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.name = "omap_hwspinlock",
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.of_match_table = of_match_ptr(omap_hwspinlock_of_match),
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},
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};
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static int __init omap_hwspinlock_init(void)
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{
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return platform_driver_register(&omap_hwspinlock_driver);
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}
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/* board init code might need to reserve hwspinlocks for predefined purposes */
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postcore_initcall(omap_hwspinlock_init);
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static void __exit omap_hwspinlock_exit(void)
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{
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platform_driver_unregister(&omap_hwspinlock_driver);
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}
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module_exit(omap_hwspinlock_exit);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Hardware spinlock driver for OMAP");
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MODULE_AUTHOR("Simon Que <sque@ti.com>");
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MODULE_AUTHOR("Hari Kanigeri <h-kanigeri2@ti.com>");
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MODULE_AUTHOR("Ohad Ben-Cohen <ohad@wizery.com>");
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