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![Wei Yongjun](/assets/img/avatar_default.png)
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR. Generated by coccinelle. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
760 lines
19 KiB
C
760 lines
19 KiB
C
/*
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* EBI driver for Atmel chips
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* inspired by the fsl weim bus driver
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*
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* Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mfd/syscon/atmel-matrix.h>
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#include <linux/mfd/syscon/atmel-smc.h>
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#include <linux/init.h>
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#include <linux/of_device.h>
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#include <linux/regmap.h>
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struct at91sam9_smc_timings {
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u32 ncs_rd_setup_ns;
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u32 nrd_setup_ns;
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u32 ncs_wr_setup_ns;
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u32 nwe_setup_ns;
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u32 ncs_rd_pulse_ns;
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u32 nrd_pulse_ns;
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u32 ncs_wr_pulse_ns;
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u32 nwe_pulse_ns;
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u32 nrd_cycle_ns;
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u32 nwe_cycle_ns;
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u32 tdf_ns;
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};
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struct at91sam9_smc_generic_fields {
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struct regmap_field *setup;
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struct regmap_field *pulse;
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struct regmap_field *cycle;
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struct regmap_field *mode;
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};
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struct at91sam9_ebi_dev_config {
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struct at91sam9_smc_timings timings;
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u32 mode;
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};
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struct at91_ebi_dev_config {
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int cs;
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union {
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struct at91sam9_ebi_dev_config sam9;
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};
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};
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struct at91_ebi;
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struct at91_ebi_dev {
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struct list_head node;
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struct at91_ebi *ebi;
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u32 mode;
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int numcs;
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struct at91_ebi_dev_config configs[];
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};
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struct at91_ebi_caps {
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unsigned int available_cs;
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const struct reg_field *ebi_csa;
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void (*get_config)(struct at91_ebi_dev *ebid,
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struct at91_ebi_dev_config *conf);
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int (*xlate_config)(struct at91_ebi_dev *ebid,
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struct device_node *configs_np,
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struct at91_ebi_dev_config *conf);
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int (*apply_config)(struct at91_ebi_dev *ebid,
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struct at91_ebi_dev_config *conf);
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int (*init)(struct at91_ebi *ebi);
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};
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struct at91_ebi {
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struct clk *clk;
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struct regmap *smc;
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struct regmap *matrix;
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struct regmap_field *ebi_csa;
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struct device *dev;
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const struct at91_ebi_caps *caps;
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struct list_head devs;
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union {
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struct at91sam9_smc_generic_fields sam9;
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};
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};
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static void at91sam9_ebi_get_config(struct at91_ebi_dev *ebid,
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struct at91_ebi_dev_config *conf)
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{
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struct at91sam9_smc_generic_fields *fields = &ebid->ebi->sam9;
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unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);
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struct at91sam9_ebi_dev_config *config = &conf->sam9;
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struct at91sam9_smc_timings *timings = &config->timings;
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unsigned int val;
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regmap_fields_read(fields->mode, conf->cs, &val);
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config->mode = val & ~AT91_SMC_TDF;
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val = (val & AT91_SMC_TDF) >> 16;
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timings->tdf_ns = clk_rate * val;
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regmap_fields_read(fields->setup, conf->cs, &val);
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timings->ncs_rd_setup_ns = (val >> 24) & 0x1f;
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timings->ncs_rd_setup_ns += ((val >> 29) & 0x1) * 128;
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timings->ncs_rd_setup_ns *= clk_rate;
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timings->nrd_setup_ns = (val >> 16) & 0x1f;
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timings->nrd_setup_ns += ((val >> 21) & 0x1) * 128;
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timings->nrd_setup_ns *= clk_rate;
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timings->ncs_wr_setup_ns = (val >> 8) & 0x1f;
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timings->ncs_wr_setup_ns += ((val >> 13) & 0x1) * 128;
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timings->ncs_wr_setup_ns *= clk_rate;
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timings->nwe_setup_ns = val & 0x1f;
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timings->nwe_setup_ns += ((val >> 5) & 0x1) * 128;
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timings->nwe_setup_ns *= clk_rate;
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regmap_fields_read(fields->pulse, conf->cs, &val);
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timings->ncs_rd_pulse_ns = (val >> 24) & 0x3f;
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timings->ncs_rd_pulse_ns += ((val >> 30) & 0x1) * 256;
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timings->ncs_rd_pulse_ns *= clk_rate;
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timings->nrd_pulse_ns = (val >> 16) & 0x3f;
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timings->nrd_pulse_ns += ((val >> 22) & 0x1) * 256;
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timings->nrd_pulse_ns *= clk_rate;
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timings->ncs_wr_pulse_ns = (val >> 8) & 0x3f;
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timings->ncs_wr_pulse_ns += ((val >> 14) & 0x1) * 256;
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timings->ncs_wr_pulse_ns *= clk_rate;
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timings->nwe_pulse_ns = val & 0x3f;
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timings->nwe_pulse_ns += ((val >> 6) & 0x1) * 256;
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timings->nwe_pulse_ns *= clk_rate;
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regmap_fields_read(fields->cycle, conf->cs, &val);
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timings->nrd_cycle_ns = (val >> 16) & 0x7f;
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timings->nrd_cycle_ns += ((val >> 23) & 0x3) * 256;
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timings->nrd_cycle_ns *= clk_rate;
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timings->nwe_cycle_ns = val & 0x7f;
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timings->nwe_cycle_ns += ((val >> 7) & 0x3) * 256;
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timings->nwe_cycle_ns *= clk_rate;
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}
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static int at91_xlate_timing(struct device_node *np, const char *prop,
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u32 *val, bool *required)
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{
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if (!of_property_read_u32(np, prop, val)) {
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*required = true;
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return 0;
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}
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if (*required)
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return -EINVAL;
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return 0;
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}
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static int at91sam9_smc_xslate_timings(struct at91_ebi_dev *ebid,
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struct device_node *np,
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struct at91sam9_smc_timings *timings,
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bool *required)
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{
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int ret;
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ret = at91_xlate_timing(np, "atmel,smc-ncs-rd-setup-ns",
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&timings->ncs_rd_setup_ns, required);
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if (ret)
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goto out;
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ret = at91_xlate_timing(np, "atmel,smc-nrd-setup-ns",
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&timings->nrd_setup_ns, required);
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if (ret)
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goto out;
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ret = at91_xlate_timing(np, "atmel,smc-ncs-wr-setup-ns",
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&timings->ncs_wr_setup_ns, required);
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if (ret)
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goto out;
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ret = at91_xlate_timing(np, "atmel,smc-nwe-setup-ns",
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&timings->nwe_setup_ns, required);
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if (ret)
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goto out;
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ret = at91_xlate_timing(np, "atmel,smc-ncs-rd-pulse-ns",
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&timings->ncs_rd_pulse_ns, required);
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if (ret)
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goto out;
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ret = at91_xlate_timing(np, "atmel,smc-nrd-pulse-ns",
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&timings->nrd_pulse_ns, required);
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if (ret)
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goto out;
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ret = at91_xlate_timing(np, "atmel,smc-ncs-wr-pulse-ns",
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&timings->ncs_wr_pulse_ns, required);
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if (ret)
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goto out;
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ret = at91_xlate_timing(np, "atmel,smc-nwe-pulse-ns",
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&timings->nwe_pulse_ns, required);
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if (ret)
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goto out;
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ret = at91_xlate_timing(np, "atmel,smc-nwe-cycle-ns",
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&timings->nwe_cycle_ns, required);
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if (ret)
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goto out;
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ret = at91_xlate_timing(np, "atmel,smc-nrd-cycle-ns",
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&timings->nrd_cycle_ns, required);
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if (ret)
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goto out;
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ret = at91_xlate_timing(np, "atmel,smc-tdf-ns",
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&timings->tdf_ns, required);
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out:
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if (ret)
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dev_err(ebid->ebi->dev,
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"missing or invalid timings definition in %s",
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np->full_name);
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return ret;
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}
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static int at91sam9_ebi_xslate_config(struct at91_ebi_dev *ebid,
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struct device_node *np,
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struct at91_ebi_dev_config *conf)
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{
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struct at91sam9_ebi_dev_config *config = &conf->sam9;
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bool required = false;
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const char *tmp_str;
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u32 tmp;
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int ret;
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ret = of_property_read_u32(np, "atmel,smc-bus-width", &tmp);
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if (!ret) {
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switch (tmp) {
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case 8:
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config->mode |= AT91_SMC_DBW_8;
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break;
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case 16:
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config->mode |= AT91_SMC_DBW_16;
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break;
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case 32:
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config->mode |= AT91_SMC_DBW_32;
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break;
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default:
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return -EINVAL;
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}
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required = true;
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}
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if (of_property_read_bool(np, "atmel,smc-tdf-optimized")) {
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config->mode |= AT91_SMC_TDFMODE_OPTIMIZED;
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required = true;
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}
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tmp_str = NULL;
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of_property_read_string(np, "atmel,smc-byte-access-type", &tmp_str);
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if (tmp_str && !strcmp(tmp_str, "write")) {
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config->mode |= AT91_SMC_BAT_WRITE;
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required = true;
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}
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tmp_str = NULL;
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of_property_read_string(np, "atmel,smc-read-mode", &tmp_str);
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if (tmp_str && !strcmp(tmp_str, "nrd")) {
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config->mode |= AT91_SMC_READMODE_NRD;
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required = true;
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}
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tmp_str = NULL;
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of_property_read_string(np, "atmel,smc-write-mode", &tmp_str);
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if (tmp_str && !strcmp(tmp_str, "nwe")) {
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config->mode |= AT91_SMC_WRITEMODE_NWE;
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required = true;
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}
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tmp_str = NULL;
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of_property_read_string(np, "atmel,smc-exnw-mode", &tmp_str);
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if (tmp_str) {
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if (!strcmp(tmp_str, "frozen"))
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config->mode |= AT91_SMC_EXNWMODE_FROZEN;
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else if (!strcmp(tmp_str, "ready"))
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config->mode |= AT91_SMC_EXNWMODE_READY;
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else if (strcmp(tmp_str, "disabled"))
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return -EINVAL;
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required = true;
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}
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ret = of_property_read_u32(np, "atmel,smc-page-mode", &tmp);
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if (!ret) {
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switch (tmp) {
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case 4:
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config->mode |= AT91_SMC_PS_4;
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break;
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case 8:
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config->mode |= AT91_SMC_PS_8;
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break;
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case 16:
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config->mode |= AT91_SMC_PS_16;
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break;
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case 32:
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config->mode |= AT91_SMC_PS_32;
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break;
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default:
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return -EINVAL;
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}
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config->mode |= AT91_SMC_PMEN;
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required = true;
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}
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ret = at91sam9_smc_xslate_timings(ebid, np, &config->timings,
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&required);
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if (ret)
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return ret;
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return required;
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}
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static int at91sam9_ebi_apply_config(struct at91_ebi_dev *ebid,
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struct at91_ebi_dev_config *conf)
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{
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unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);
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struct at91sam9_ebi_dev_config *config = &conf->sam9;
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struct at91sam9_smc_timings *timings = &config->timings;
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struct at91sam9_smc_generic_fields *fields = &ebid->ebi->sam9;
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u32 coded_val;
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u32 val;
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coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
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timings->ncs_rd_setup_ns);
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val = AT91SAM9_SMC_NCS_NRDSETUP(coded_val);
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coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
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timings->nrd_setup_ns);
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val |= AT91SAM9_SMC_NRDSETUP(coded_val);
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coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
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timings->ncs_wr_setup_ns);
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val |= AT91SAM9_SMC_NCS_WRSETUP(coded_val);
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coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
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timings->nwe_setup_ns);
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val |= AT91SAM9_SMC_NWESETUP(coded_val);
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regmap_fields_write(fields->setup, conf->cs, val);
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coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
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timings->ncs_rd_pulse_ns);
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val = AT91SAM9_SMC_NCS_NRDPULSE(coded_val);
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coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
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timings->nrd_pulse_ns);
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val |= AT91SAM9_SMC_NRDPULSE(coded_val);
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coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
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timings->ncs_wr_pulse_ns);
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val |= AT91SAM9_SMC_NCS_WRPULSE(coded_val);
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coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
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timings->nwe_pulse_ns);
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val |= AT91SAM9_SMC_NWEPULSE(coded_val);
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regmap_fields_write(fields->pulse, conf->cs, val);
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coded_val = at91sam9_smc_cycle_ns_to_cycles(clk_rate,
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timings->nrd_cycle_ns);
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val = AT91SAM9_SMC_NRDCYCLE(coded_val);
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coded_val = at91sam9_smc_cycle_ns_to_cycles(clk_rate,
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timings->nwe_cycle_ns);
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val |= AT91SAM9_SMC_NWECYCLE(coded_val);
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regmap_fields_write(fields->cycle, conf->cs, val);
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val = DIV_ROUND_UP(timings->tdf_ns, clk_rate);
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if (val > AT91_SMC_TDF_MAX)
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val = AT91_SMC_TDF_MAX;
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regmap_fields_write(fields->mode, conf->cs,
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config->mode | AT91_SMC_TDF_(val));
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return 0;
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}
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static int at91sam9_ebi_init(struct at91_ebi *ebi)
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{
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struct at91sam9_smc_generic_fields *fields = &ebi->sam9;
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struct reg_field field = REG_FIELD(0, 0, 31);
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field.id_size = fls(ebi->caps->available_cs);
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field.id_offset = AT91SAM9_SMC_GENERIC_BLK_SZ;
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field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC);
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fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
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if (IS_ERR(fields->setup))
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return PTR_ERR(fields->setup);
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field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC);
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fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
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if (IS_ERR(fields->pulse))
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return PTR_ERR(fields->pulse);
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field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC);
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fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
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if (IS_ERR(fields->cycle))
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return PTR_ERR(fields->cycle);
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field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC);
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fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
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return PTR_ERR_OR_ZERO(fields->mode);
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}
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static int sama5d3_ebi_init(struct at91_ebi *ebi)
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{
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struct at91sam9_smc_generic_fields *fields = &ebi->sam9;
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struct reg_field field = REG_FIELD(0, 0, 31);
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field.id_size = fls(ebi->caps->available_cs);
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field.id_offset = SAMA5_SMC_GENERIC_BLK_SZ;
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field.reg = AT91SAM9_SMC_SETUP(SAMA5_SMC_GENERIC);
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fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
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if (IS_ERR(fields->setup))
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return PTR_ERR(fields->setup);
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field.reg = AT91SAM9_SMC_PULSE(SAMA5_SMC_GENERIC);
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fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
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if (IS_ERR(fields->pulse))
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return PTR_ERR(fields->pulse);
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field.reg = AT91SAM9_SMC_CYCLE(SAMA5_SMC_GENERIC);
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fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
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if (IS_ERR(fields->cycle))
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return PTR_ERR(fields->cycle);
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field.reg = SAMA5_SMC_MODE(SAMA5_SMC_GENERIC);
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fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc, field);
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return PTR_ERR_OR_ZERO(fields->mode);
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}
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static int at91_ebi_dev_setup(struct at91_ebi *ebi, struct device_node *np,
|
|
int reg_cells)
|
|
{
|
|
const struct at91_ebi_caps *caps = ebi->caps;
|
|
struct at91_ebi_dev_config conf = { };
|
|
struct device *dev = ebi->dev;
|
|
struct at91_ebi_dev *ebid;
|
|
int ret, numcs = 0, i;
|
|
bool apply = false;
|
|
|
|
numcs = of_property_count_elems_of_size(np, "reg",
|
|
reg_cells * sizeof(u32));
|
|
if (numcs <= 0) {
|
|
dev_err(dev, "invalid reg property in %s\n", np->full_name);
|
|
return -EINVAL;
|
|
}
|
|
|
|
ebid = devm_kzalloc(ebi->dev,
|
|
sizeof(*ebid) + (numcs * sizeof(*ebid->configs)),
|
|
GFP_KERNEL);
|
|
if (!ebid)
|
|
return -ENOMEM;
|
|
|
|
ebid->ebi = ebi;
|
|
|
|
ret = caps->xlate_config(ebid, np, &conf);
|
|
if (ret < 0)
|
|
return ret;
|
|
else if (ret)
|
|
apply = true;
|
|
|
|
for (i = 0; i < numcs; i++) {
|
|
u32 cs;
|
|
|
|
ret = of_property_read_u32_index(np, "reg", i * reg_cells,
|
|
&cs);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (cs > AT91_MATRIX_EBI_NUM_CS ||
|
|
!(ebi->caps->available_cs & BIT(cs))) {
|
|
dev_err(dev, "invalid reg property in %s\n",
|
|
np->full_name);
|
|
return -EINVAL;
|
|
}
|
|
|
|
ebid->configs[i].cs = cs;
|
|
|
|
if (apply) {
|
|
conf.cs = cs;
|
|
ret = caps->apply_config(ebid, &conf);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
caps->get_config(ebid, &ebid->configs[i]);
|
|
|
|
/*
|
|
* Attach the EBI device to the generic SMC logic if at least
|
|
* one "atmel,smc-" property is present.
|
|
*/
|
|
if (ebi->ebi_csa && ret)
|
|
regmap_field_update_bits(ebi->ebi_csa,
|
|
BIT(cs), 0);
|
|
}
|
|
|
|
list_add_tail(&ebid->node, &ebi->devs);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct reg_field at91sam9260_ebi_csa =
|
|
REG_FIELD(AT91SAM9260_MATRIX_EBICSA, 0,
|
|
AT91_MATRIX_EBI_NUM_CS - 1);
|
|
|
|
static const struct at91_ebi_caps at91sam9260_ebi_caps = {
|
|
.available_cs = 0xff,
|
|
.ebi_csa = &at91sam9260_ebi_csa,
|
|
.get_config = at91sam9_ebi_get_config,
|
|
.xlate_config = at91sam9_ebi_xslate_config,
|
|
.apply_config = at91sam9_ebi_apply_config,
|
|
.init = at91sam9_ebi_init,
|
|
};
|
|
|
|
static const struct reg_field at91sam9261_ebi_csa =
|
|
REG_FIELD(AT91SAM9261_MATRIX_EBICSA, 0,
|
|
AT91_MATRIX_EBI_NUM_CS - 1);
|
|
|
|
static const struct at91_ebi_caps at91sam9261_ebi_caps = {
|
|
.available_cs = 0xff,
|
|
.ebi_csa = &at91sam9261_ebi_csa,
|
|
.get_config = at91sam9_ebi_get_config,
|
|
.xlate_config = at91sam9_ebi_xslate_config,
|
|
.apply_config = at91sam9_ebi_apply_config,
|
|
.init = at91sam9_ebi_init,
|
|
};
|
|
|
|
static const struct reg_field at91sam9263_ebi0_csa =
|
|
REG_FIELD(AT91SAM9263_MATRIX_EBI0CSA, 0,
|
|
AT91_MATRIX_EBI_NUM_CS - 1);
|
|
|
|
static const struct at91_ebi_caps at91sam9263_ebi0_caps = {
|
|
.available_cs = 0x3f,
|
|
.ebi_csa = &at91sam9263_ebi0_csa,
|
|
.get_config = at91sam9_ebi_get_config,
|
|
.xlate_config = at91sam9_ebi_xslate_config,
|
|
.apply_config = at91sam9_ebi_apply_config,
|
|
.init = at91sam9_ebi_init,
|
|
};
|
|
|
|
static const struct reg_field at91sam9263_ebi1_csa =
|
|
REG_FIELD(AT91SAM9263_MATRIX_EBI1CSA, 0,
|
|
AT91_MATRIX_EBI_NUM_CS - 1);
|
|
|
|
static const struct at91_ebi_caps at91sam9263_ebi1_caps = {
|
|
.available_cs = 0x7,
|
|
.ebi_csa = &at91sam9263_ebi1_csa,
|
|
.get_config = at91sam9_ebi_get_config,
|
|
.xlate_config = at91sam9_ebi_xslate_config,
|
|
.apply_config = at91sam9_ebi_apply_config,
|
|
.init = at91sam9_ebi_init,
|
|
};
|
|
|
|
static const struct reg_field at91sam9rl_ebi_csa =
|
|
REG_FIELD(AT91SAM9RL_MATRIX_EBICSA, 0,
|
|
AT91_MATRIX_EBI_NUM_CS - 1);
|
|
|
|
static const struct at91_ebi_caps at91sam9rl_ebi_caps = {
|
|
.available_cs = 0x3f,
|
|
.ebi_csa = &at91sam9rl_ebi_csa,
|
|
.get_config = at91sam9_ebi_get_config,
|
|
.xlate_config = at91sam9_ebi_xslate_config,
|
|
.apply_config = at91sam9_ebi_apply_config,
|
|
.init = at91sam9_ebi_init,
|
|
};
|
|
|
|
static const struct reg_field at91sam9g45_ebi_csa =
|
|
REG_FIELD(AT91SAM9G45_MATRIX_EBICSA, 0,
|
|
AT91_MATRIX_EBI_NUM_CS - 1);
|
|
|
|
static const struct at91_ebi_caps at91sam9g45_ebi_caps = {
|
|
.available_cs = 0x3f,
|
|
.ebi_csa = &at91sam9g45_ebi_csa,
|
|
.get_config = at91sam9_ebi_get_config,
|
|
.xlate_config = at91sam9_ebi_xslate_config,
|
|
.apply_config = at91sam9_ebi_apply_config,
|
|
.init = at91sam9_ebi_init,
|
|
};
|
|
|
|
static const struct at91_ebi_caps at91sam9x5_ebi_caps = {
|
|
.available_cs = 0x3f,
|
|
.ebi_csa = &at91sam9263_ebi0_csa,
|
|
.get_config = at91sam9_ebi_get_config,
|
|
.xlate_config = at91sam9_ebi_xslate_config,
|
|
.apply_config = at91sam9_ebi_apply_config,
|
|
.init = at91sam9_ebi_init,
|
|
};
|
|
|
|
static const struct at91_ebi_caps sama5d3_ebi_caps = {
|
|
.available_cs = 0xf,
|
|
.get_config = at91sam9_ebi_get_config,
|
|
.xlate_config = at91sam9_ebi_xslate_config,
|
|
.apply_config = at91sam9_ebi_apply_config,
|
|
.init = sama5d3_ebi_init,
|
|
};
|
|
|
|
static const struct of_device_id at91_ebi_id_table[] = {
|
|
{
|
|
.compatible = "atmel,at91sam9260-ebi",
|
|
.data = &at91sam9260_ebi_caps,
|
|
},
|
|
{
|
|
.compatible = "atmel,at91sam9261-ebi",
|
|
.data = &at91sam9261_ebi_caps,
|
|
},
|
|
{
|
|
.compatible = "atmel,at91sam9263-ebi0",
|
|
.data = &at91sam9263_ebi0_caps,
|
|
},
|
|
{
|
|
.compatible = "atmel,at91sam9263-ebi1",
|
|
.data = &at91sam9263_ebi1_caps,
|
|
},
|
|
{
|
|
.compatible = "atmel,at91sam9rl-ebi",
|
|
.data = &at91sam9rl_ebi_caps,
|
|
},
|
|
{
|
|
.compatible = "atmel,at91sam9g45-ebi",
|
|
.data = &at91sam9g45_ebi_caps,
|
|
},
|
|
{
|
|
.compatible = "atmel,at91sam9x5-ebi",
|
|
.data = &at91sam9x5_ebi_caps,
|
|
},
|
|
{
|
|
.compatible = "atmel,sama5d3-ebi",
|
|
.data = &sama5d3_ebi_caps,
|
|
},
|
|
{ /* sentinel */ }
|
|
};
|
|
|
|
static int at91_ebi_dev_disable(struct at91_ebi *ebi, struct device_node *np)
|
|
{
|
|
struct device *dev = ebi->dev;
|
|
struct property *newprop;
|
|
|
|
newprop = devm_kzalloc(dev, sizeof(*newprop), GFP_KERNEL);
|
|
if (!newprop)
|
|
return -ENOMEM;
|
|
|
|
newprop->name = devm_kstrdup(dev, "status", GFP_KERNEL);
|
|
if (!newprop->name)
|
|
return -ENOMEM;
|
|
|
|
newprop->value = devm_kstrdup(dev, "disabled", GFP_KERNEL);
|
|
if (!newprop->name)
|
|
return -ENOMEM;
|
|
|
|
newprop->length = sizeof("disabled");
|
|
|
|
return of_update_property(np, newprop);
|
|
}
|
|
|
|
static int at91_ebi_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct device_node *child, *np = dev->of_node;
|
|
const struct of_device_id *match;
|
|
struct at91_ebi *ebi;
|
|
int ret, reg_cells;
|
|
struct clk *clk;
|
|
u32 val;
|
|
|
|
match = of_match_device(at91_ebi_id_table, dev);
|
|
if (!match || !match->data)
|
|
return -EINVAL;
|
|
|
|
ebi = devm_kzalloc(dev, sizeof(*ebi), GFP_KERNEL);
|
|
if (!ebi)
|
|
return -ENOMEM;
|
|
|
|
INIT_LIST_HEAD(&ebi->devs);
|
|
ebi->caps = match->data;
|
|
ebi->dev = dev;
|
|
|
|
clk = devm_clk_get(dev, NULL);
|
|
if (IS_ERR(clk))
|
|
return PTR_ERR(clk);
|
|
|
|
ebi->clk = clk;
|
|
|
|
ebi->smc = syscon_regmap_lookup_by_phandle(np, "atmel,smc");
|
|
if (IS_ERR(ebi->smc))
|
|
return PTR_ERR(ebi->smc);
|
|
|
|
/*
|
|
* The sama5d3 does not provide an EBICSA register and thus does need
|
|
* to access the matrix registers.
|
|
*/
|
|
if (ebi->caps->ebi_csa) {
|
|
ebi->matrix =
|
|
syscon_regmap_lookup_by_phandle(np, "atmel,matrix");
|
|
if (IS_ERR(ebi->matrix))
|
|
return PTR_ERR(ebi->matrix);
|
|
|
|
ebi->ebi_csa = regmap_field_alloc(ebi->matrix,
|
|
*ebi->caps->ebi_csa);
|
|
if (IS_ERR(ebi->ebi_csa))
|
|
return PTR_ERR(ebi->ebi_csa);
|
|
}
|
|
|
|
ret = ebi->caps->init(ebi);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = of_property_read_u32(np, "#address-cells", &val);
|
|
if (ret) {
|
|
dev_err(dev, "missing #address-cells property\n");
|
|
return ret;
|
|
}
|
|
|
|
reg_cells = val;
|
|
|
|
ret = of_property_read_u32(np, "#size-cells", &val);
|
|
if (ret) {
|
|
dev_err(dev, "missing #address-cells property\n");
|
|
return ret;
|
|
}
|
|
|
|
reg_cells += val;
|
|
|
|
for_each_available_child_of_node(np, child) {
|
|
if (!of_find_property(child, "reg", NULL))
|
|
continue;
|
|
|
|
ret = at91_ebi_dev_setup(ebi, child, reg_cells);
|
|
if (ret) {
|
|
dev_err(dev, "failed to configure EBI bus for %s, disabling the device",
|
|
child->full_name);
|
|
|
|
ret = at91_ebi_dev_disable(ebi, child);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return of_platform_populate(np, NULL, NULL, dev);
|
|
}
|
|
|
|
static struct platform_driver at91_ebi_driver = {
|
|
.driver = {
|
|
.name = "atmel-ebi",
|
|
.of_match_table = at91_ebi_id_table,
|
|
},
|
|
};
|
|
builtin_platform_driver_probe(at91_ebi_driver, at91_ebi_probe);
|