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09cfefb7fa
Add memory management support for LoongArch, including: cache and tlb management, page fault handling and ioremap/mmap support. Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
27 lines
591 B
C
27 lines
591 B
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*/
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#include <asm/io.h>
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void __init __iomem *early_ioremap(u64 phys_addr, unsigned long size)
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{
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return ((void __iomem *)TO_CACHE(phys_addr));
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}
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void __init early_iounmap(void __iomem *addr, unsigned long size)
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{
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}
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void *early_memremap_ro(resource_size_t phys_addr, unsigned long size)
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{
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return early_memremap(phys_addr, size);
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}
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void *early_memremap_prot(resource_size_t phys_addr, unsigned long size,
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unsigned long prot_val)
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{
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return early_memremap(phys_addr, size);
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}
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