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6b7a21140f
Add the definition for smp_rmb(), smp_wmb(), and smp_mb() to the
tools include infrastructure: this patch adds the implementation
for x86-64 and arm64, and have it fall back as currently is for
other archs which do not have it implemented at this point. The
x86-64 one uses lock + add combination for smp_mb() with address
below red zone.
This is on top of 09d62154f6 ("tools, perf: add and use optimized
ring_buffer_{read_head, write_tail} helpers"), which didn't touch
smp_* barrier implementations. Magnus recently rightfully reported
however that the latter on x86-64 still wrongly falls back to sfence,
lfence and mfence respectively, thus fix that for applications under
tools making use of these to avoid such ugly surprises. The main
header under tools (include/asm/barrier.h) will in that case not
select the fallback implementation.
Reported-by: Magnus Karlsson <magnus.karlsson@intel.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
46 lines
1.3 KiB
C
46 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _TOOLS_LINUX_ASM_X86_BARRIER_H
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#define _TOOLS_LINUX_ASM_X86_BARRIER_H
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/*
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* Copied from the Linux kernel sources, and also moving code
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* out from tools/perf/perf-sys.h so as to make it be located
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* in a place similar as in the kernel sources.
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*
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* Force strict CPU ordering.
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* And yes, this is required on UP too when we're talking
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* to devices.
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*/
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#if defined(__i386__)
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/*
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* Some non-Intel clones support out of order store. wmb() ceases to be a
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* nop for these.
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*/
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#define mb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
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#define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
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#define wmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
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#elif defined(__x86_64__)
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#define mb() asm volatile("mfence" ::: "memory")
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#define rmb() asm volatile("lfence" ::: "memory")
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#define wmb() asm volatile("sfence" ::: "memory")
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#define smp_rmb() barrier()
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#define smp_wmb() barrier()
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#define smp_mb() asm volatile("lock; addl $0,-132(%%rsp)" ::: "memory", "cc")
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#endif
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#if defined(__x86_64__)
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#define smp_store_release(p, v) \
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do { \
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barrier(); \
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WRITE_ONCE(*p, v); \
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} while (0)
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#define smp_load_acquire(p) \
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({ \
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typeof(*p) ___p1 = READ_ONCE(*p); \
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barrier(); \
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___p1; \
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})
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#endif /* defined(__x86_64__) */
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#endif /* _TOOLS_LINUX_ASM_X86_BARRIER_H */
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