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During boot tsc is calibrated twice: once in tsc_early_delay_calibrate(), and the second time in tsc_init(). Rename tsc_early_delay_calibrate() to tsc_early_init(), and rework it so the calibration is done only early, and make tsc_init() to use the values already determined in tsc_early_init(). Sometimes it is not possible to determine tsc early, as the subsystem that is required is not yet initialized, in such case try again later in tsc_init(). Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Pavel Tatashin <pasha.tatashin@oracle.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: steven.sistare@oracle.com Cc: daniel.m.jordan@oracle.com Cc: linux@armlinux.org.uk Cc: schwidefsky@de.ibm.com Cc: heiko.carstens@de.ibm.com Cc: john.stultz@linaro.org Cc: sboyd@codeaurora.org Cc: hpa@zytor.com Cc: douly.fnst@cn.fujitsu.com Cc: peterz@infradead.org Cc: prarit@redhat.com Cc: feng.tang@intel.com Cc: pmladek@suse.com Cc: gnomes@lxorguk.ukuu.org.uk Cc: linux-s390@vger.kernel.org Cc: boris.ostrovsky@oracle.com Cc: jgross@suse.com Cc: pbonzini@redhat.com Link: https://lkml.kernel.org/r/20180719205545.16512-20-pasha.tatashin@oracle.com
75 lines
1.9 KiB
C
75 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* x86 TSC related functions
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*/
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#ifndef _ASM_X86_TSC_H
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#define _ASM_X86_TSC_H
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#include <asm/processor.h>
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#define NS_SCALE 10 /* 2^10, carefully chosen */
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#define US_SCALE 32 /* 2^32, arbitralrily chosen */
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/*
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* Standard way to access the cycle counter.
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*/
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typedef unsigned long long cycles_t;
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extern unsigned int cpu_khz;
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extern unsigned int tsc_khz;
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extern void disable_TSC(void);
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static inline cycles_t get_cycles(void)
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{
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#ifndef CONFIG_X86_TSC
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if (!boot_cpu_has(X86_FEATURE_TSC))
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return 0;
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#endif
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return rdtsc();
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}
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extern struct system_counterval_t convert_art_to_tsc(u64 art);
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extern struct system_counterval_t convert_art_ns_to_tsc(u64 art_ns);
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extern void tsc_early_init(void);
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extern void tsc_init(void);
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extern void mark_tsc_unstable(char *reason);
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extern int unsynchronized_tsc(void);
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extern int check_tsc_unstable(void);
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extern void mark_tsc_async_resets(char *reason);
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extern unsigned long native_calibrate_cpu(void);
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extern unsigned long native_calibrate_tsc(void);
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extern unsigned long long native_sched_clock_from_tsc(u64 tsc);
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extern int tsc_clocksource_reliable;
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#ifdef CONFIG_X86_TSC
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extern bool tsc_async_resets;
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#else
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# define tsc_async_resets false
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#endif
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/*
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* Boot-time check whether the TSCs are synchronized across
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* all CPUs/cores:
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*/
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#ifdef CONFIG_X86_TSC
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extern bool tsc_store_and_check_tsc_adjust(bool bootcpu);
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extern void tsc_verify_tsc_adjust(bool resume);
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extern void check_tsc_sync_source(int cpu);
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extern void check_tsc_sync_target(void);
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#else
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static inline bool tsc_store_and_check_tsc_adjust(bool bootcpu) { return false; }
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static inline void tsc_verify_tsc_adjust(bool resume) { }
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static inline void check_tsc_sync_source(int cpu) { }
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static inline void check_tsc_sync_target(void) { }
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#endif
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extern int notsc_setup(char *);
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extern void tsc_save_sched_clock_state(void);
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extern void tsc_restore_sched_clock_state(void);
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unsigned long cpu_khz_from_msr(void);
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#endif /* _ASM_X86_TSC_H */
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