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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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05d3b7c68e
The way hw_onecell_data is declared:
struct clk_hw_onecell_data {
unsigned int num;
struct clk_hw *hws[];
};
makes it impossible to have the clk_hw table declared outside while
using ARRAY_SIZE() to determine ".num" due to ".hws" being a flexible
array member.
Completely move out of hw_onecell_data and add a custom
devm_of_clk_add_hw_provider() "get" callback to retrieve the clk_hw
in order to finally get rid on the NR_CLKS define.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-6-38172d17c27a@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
147 lines
3.9 KiB
Text
147 lines
3.9 KiB
Text
# SPDX-License-Identifier: GPL-2.0-only
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menu "Clock support for Amlogic platforms"
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depends on ARCH_MESON || COMPILE_TEST
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config COMMON_CLK_MESON_REGMAP
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tristate
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select REGMAP
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config COMMON_CLK_MESON_DUALDIV
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tristate
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select COMMON_CLK_MESON_REGMAP
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config COMMON_CLK_MESON_MPLL
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tristate
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select COMMON_CLK_MESON_REGMAP
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config COMMON_CLK_MESON_PHASE
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tristate
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select COMMON_CLK_MESON_REGMAP
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config COMMON_CLK_MESON_PLL
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tristate
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select COMMON_CLK_MESON_REGMAP
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config COMMON_CLK_MESON_SCLK_DIV
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tristate
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select COMMON_CLK_MESON_REGMAP
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config COMMON_CLK_MESON_VID_PLL_DIV
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tristate
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select COMMON_CLK_MESON_REGMAP
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config COMMON_CLK_MESON_CLKC_UTILS
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tristate
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config COMMON_CLK_MESON_AO_CLKC
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tristate
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select COMMON_CLK_MESON_REGMAP
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select COMMON_CLK_MESON_CLKC_UTILS
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select RESET_CONTROLLER
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config COMMON_CLK_MESON_EE_CLKC
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tristate
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select COMMON_CLK_MESON_REGMAP
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select COMMON_CLK_MESON_CLKC_UTILS
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config COMMON_CLK_MESON_CPU_DYNDIV
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tristate
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select COMMON_CLK_MESON_REGMAP
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config COMMON_CLK_MESON8B
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bool "Meson8 SoC Clock controller support"
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depends on ARM
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default y
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select COMMON_CLK_MESON_REGMAP
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select COMMON_CLK_MESON_CLKC_UTILS
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select COMMON_CLK_MESON_MPLL
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select COMMON_CLK_MESON_PLL
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select MFD_SYSCON
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select RESET_CONTROLLER
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help
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Support for the clock controller on AmLogic S802 (Meson8),
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S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you
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want peripherals and CPU frequency scaling to work.
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config COMMON_CLK_GXBB
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tristate "GXBB and GXL SoC clock controllers support"
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depends on ARM64
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default y
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select COMMON_CLK_MESON_REGMAP
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select COMMON_CLK_MESON_DUALDIV
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select COMMON_CLK_MESON_VID_PLL_DIV
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select COMMON_CLK_MESON_MPLL
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select COMMON_CLK_MESON_PLL
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select COMMON_CLK_MESON_AO_CLKC
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select COMMON_CLK_MESON_EE_CLKC
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select MFD_SYSCON
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help
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Support for the clock controller on AmLogic S905 devices, aka gxbb.
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Say Y if you want peripherals and CPU frequency scaling to work.
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config COMMON_CLK_AXG
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tristate "AXG SoC clock controllers support"
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depends on ARM64
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default y
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select COMMON_CLK_MESON_REGMAP
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select COMMON_CLK_MESON_DUALDIV
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select COMMON_CLK_MESON_MPLL
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select COMMON_CLK_MESON_PLL
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select COMMON_CLK_MESON_AO_CLKC
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select COMMON_CLK_MESON_EE_CLKC
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select MFD_SYSCON
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help
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Support for the clock controller on AmLogic A113D devices, aka axg.
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Say Y if you want peripherals and CPU frequency scaling to work.
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config COMMON_CLK_AXG_AUDIO
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tristate "Meson AXG Audio Clock Controller Driver"
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depends on ARM64
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select COMMON_CLK_MESON_REGMAP
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select COMMON_CLK_MESON_PHASE
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select COMMON_CLK_MESON_SCLK_DIV
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select COMMON_CLK_MESON_CLKC_UTILS
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select REGMAP_MMIO
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help
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Support for the audio clock controller on AmLogic A113D devices,
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aka axg, Say Y if you want audio subsystem to work.
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config COMMON_CLK_A1_PLL
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tristate "Amlogic A1 SoC PLL controller support"
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depends on ARM64
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select COMMON_CLK_MESON_REGMAP
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select COMMON_CLK_MESON_CLKC_UTILS
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select COMMON_CLK_MESON_PLL
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help
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Support for the PLL clock controller on Amlogic A113L based
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device, A1 SoC Family. Say Y if you want A1 PLL clock controller
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to work.
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config COMMON_CLK_A1_PERIPHERALS
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tristate "Amlogic A1 SoC Peripherals clock controller support"
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depends on ARM64
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select COMMON_CLK_MESON_DUALDIV
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select COMMON_CLK_MESON_REGMAP
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select COMMON_CLK_MESON_CLKC_UTILS
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help
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Support for the Peripherals clock controller on Amlogic A113L based
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device, A1 SoC Family. Say Y if you want A1 Peripherals clock
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controller to work.
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config COMMON_CLK_G12A
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tristate "G12 and SM1 SoC clock controllers support"
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depends on ARM64
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default y
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select COMMON_CLK_MESON_REGMAP
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select COMMON_CLK_MESON_DUALDIV
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select COMMON_CLK_MESON_MPLL
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select COMMON_CLK_MESON_PLL
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select COMMON_CLK_MESON_AO_CLKC
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select COMMON_CLK_MESON_EE_CLKC
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select COMMON_CLK_MESON_CPU_DYNDIV
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select COMMON_CLK_MESON_VID_PLL_DIV
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select MFD_SYSCON
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help
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Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2
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devices, aka g12a. Say Y if you want peripherals to work.
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endmenu
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