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a96cbb146a
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Acked-by: Dinh Nguyen <dinguyen@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> # samsung Acked-by: Heiko Stuebner <heiko@sntech.de> #rockchip Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> # versaclock5 Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230718143156.1066339-1-robh@kernel.org Acked-by: Abel Vesa <abel.vesa@linaro.org> #imx Signed-off-by: Stephen Boyd <sboyd@kernel.org>
98 lines
2.5 KiB
C
98 lines
2.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2014 Free Electrons
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*
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* Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
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*
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* Allwinner A31 APB0 clock gates driver
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*/
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#include <linux/clk-provider.h>
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#include <linux/init.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#define SUN6I_APB0_GATES_MAX_SIZE 32
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struct gates_data {
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DECLARE_BITMAP(mask, SUN6I_APB0_GATES_MAX_SIZE);
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};
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static const struct gates_data sun6i_a31_apb0_gates __initconst = {
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.mask = {0x7F},
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};
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static const struct gates_data sun8i_a23_apb0_gates __initconst = {
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.mask = {0x5D},
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};
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static const struct of_device_id sun6i_a31_apb0_gates_clk_dt_ids[] = {
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{ .compatible = "allwinner,sun6i-a31-apb0-gates-clk", .data = &sun6i_a31_apb0_gates },
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{ .compatible = "allwinner,sun8i-a23-apb0-gates-clk", .data = &sun8i_a23_apb0_gates },
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{ /* sentinel */ }
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};
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static int sun6i_a31_apb0_gates_clk_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct clk_onecell_data *clk_data;
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const struct gates_data *data;
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const char *clk_parent;
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const char *clk_name;
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void __iomem *reg;
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int ngates;
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int i;
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int j = 0;
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if (!np)
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return -ENODEV;
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data = of_device_get_match_data(&pdev->dev);
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if (!data)
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return -ENODEV;
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reg = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(reg))
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return PTR_ERR(reg);
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clk_parent = of_clk_get_parent_name(np, 0);
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if (!clk_parent)
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return -EINVAL;
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clk_data = devm_kzalloc(&pdev->dev, sizeof(struct clk_onecell_data),
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GFP_KERNEL);
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if (!clk_data)
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return -ENOMEM;
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/* Worst-case size approximation and memory allocation */
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ngates = find_last_bit(data->mask, SUN6I_APB0_GATES_MAX_SIZE);
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clk_data->clks = devm_kcalloc(&pdev->dev, (ngates + 1),
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sizeof(struct clk *), GFP_KERNEL);
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if (!clk_data->clks)
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return -ENOMEM;
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for_each_set_bit(i, data->mask, SUN6I_APB0_GATES_MAX_SIZE) {
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of_property_read_string_index(np, "clock-output-names",
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j, &clk_name);
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clk_data->clks[i] = clk_register_gate(&pdev->dev, clk_name,
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clk_parent, 0, reg, i,
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0, NULL);
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WARN_ON(IS_ERR(clk_data->clks[i]));
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j++;
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}
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clk_data->clk_num = ngates + 1;
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return of_clk_add_provider(np, of_clk_src_onecell_get, clk_data);
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}
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static struct platform_driver sun6i_a31_apb0_gates_clk_driver = {
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.driver = {
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.name = "sun6i-a31-apb0-gates-clk",
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.of_match_table = sun6i_a31_apb0_gates_clk_dt_ids,
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},
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.probe = sun6i_a31_apb0_gates_clk_probe,
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};
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builtin_platform_driver(sun6i_a31_apb0_gates_clk_driver);
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