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![David Lechner](/assets/img/avatar_default.png)
This adds a new driver for mach-davinci PLL clocks. This is porting the code from arch/arm/mach-davinci/clock.c to the common clock framework. Additionally, it adds device tree support for these clocks. The ifeq ($(CONFIG_COMMON_CLK), y) in the Makefile is needed to prevent compile errors until the clock code in arch/arm/mach-davinci is removed. Note: although there are similar clocks for TI Keystone we are not able to share the code for a few reasons. The keystone clocks are device tree only and use legacy one-node-per-clock bindings. Also the register layouts are a bit different, which would add even more if/else mess to the keystone clocks. And the keystone PLL driver doesn't support setting clock rates. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
21 lines
465 B
C
21 lines
465 B
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* PLL clock driver for TI Davinci SoCs
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*
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* Copyright (C) 2018 David Lechner <david@lechnology.com>
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*/
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#ifndef __LINUX_PLATFORM_DATA_CLK_DAVINCI_PLL_H__
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#define __LINUX_PLATFORM_DATA_CLK_DAVINCI_PLL_H__
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#include <linux/regmap.h>
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/**
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* davinci_pll_platform_data
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* @cfgchip: CFGCHIP syscon regmap
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*/
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struct davinci_pll_platform_data {
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struct regmap *cfgchip;
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};
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#endif /* __LINUX_PLATFORM_DATA_CLK_DAVINCI_PLL_H__ */
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