136 lines
4.0 KiB
C
136 lines
4.0 KiB
C
// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
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/* Copyright(c) 2014 - 2021 Intel Corporation */
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#include <adf_accel_devices.h>
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#include <adf_common_drv.h>
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#include <adf_gen2_hw_data.h>
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#include <adf_gen2_pfvf.h>
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#include "adf_c3xxx_hw_data.h"
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#include "icp_qat_hw.h"
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/* Worker thread to service arbiter mappings */
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static const u32 thrd_to_arb_map[ADF_C3XXX_MAX_ACCELENGINES] = {
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0x12222AAA, 0x11222AAA, 0x12222AAA,
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0x11222AAA, 0x12222AAA, 0x11222AAA
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};
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static struct adf_hw_device_class c3xxx_class = {
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.name = ADF_C3XXX_DEVICE_NAME,
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.type = DEV_C3XXX,
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.instances = 0
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};
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static u32 get_accel_mask(struct adf_hw_device_data *self)
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{
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u32 straps = self->straps;
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u32 fuses = self->fuses;
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u32 accel;
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accel = ~(fuses | straps) >> ADF_C3XXX_ACCELERATORS_REG_OFFSET;
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accel &= ADF_C3XXX_ACCELERATORS_MASK;
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return accel;
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}
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static u32 get_ae_mask(struct adf_hw_device_data *self)
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{
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u32 straps = self->straps;
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u32 fuses = self->fuses;
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unsigned long disabled;
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u32 ae_disable;
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int accel;
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/* If an accel is disabled, then disable the corresponding two AEs */
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disabled = ~get_accel_mask(self) & ADF_C3XXX_ACCELERATORS_MASK;
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ae_disable = BIT(1) | BIT(0);
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for_each_set_bit(accel, &disabled, ADF_C3XXX_MAX_ACCELERATORS)
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straps |= ae_disable << (accel << 1);
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return ~(fuses | straps) & ADF_C3XXX_ACCELENGINES_MASK;
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}
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static u32 get_misc_bar_id(struct adf_hw_device_data *self)
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{
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return ADF_C3XXX_PMISC_BAR;
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}
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static u32 get_etr_bar_id(struct adf_hw_device_data *self)
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{
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return ADF_C3XXX_ETR_BAR;
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}
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static u32 get_sram_bar_id(struct adf_hw_device_data *self)
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{
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return ADF_C3XXX_SRAM_BAR;
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}
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static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
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{
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int aes = self->get_num_aes(self);
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if (aes == 6)
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return DEV_SKU_4;
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return DEV_SKU_UNKNOWN;
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}
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static const u32 *adf_get_arbiter_mapping(void)
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{
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return thrd_to_arb_map;
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}
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static void configure_iov_threads(struct adf_accel_dev *accel_dev, bool enable)
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{
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adf_gen2_cfg_iov_thds(accel_dev, enable,
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ADF_C3XXX_AE2FUNC_MAP_GRP_A_NUM_REGS,
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ADF_C3XXX_AE2FUNC_MAP_GRP_B_NUM_REGS);
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}
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void adf_init_hw_data_c3xxx(struct adf_hw_device_data *hw_data)
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{
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hw_data->dev_class = &c3xxx_class;
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hw_data->instance_id = c3xxx_class.instances++;
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hw_data->num_banks = ADF_C3XXX_ETR_MAX_BANKS;
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hw_data->num_rings_per_bank = ADF_ETR_MAX_RINGS_PER_BANK;
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hw_data->num_accel = ADF_C3XXX_MAX_ACCELERATORS;
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hw_data->num_logical_accel = 1;
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hw_data->num_engines = ADF_C3XXX_MAX_ACCELENGINES;
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hw_data->tx_rx_gap = ADF_GEN2_RX_RINGS_OFFSET;
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hw_data->tx_rings_mask = ADF_GEN2_TX_RINGS_MASK;
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hw_data->ring_to_svc_map = ADF_GEN2_DEFAULT_RING_TO_SRV_MAP;
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hw_data->alloc_irq = adf_isr_resource_alloc;
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hw_data->free_irq = adf_isr_resource_free;
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hw_data->enable_error_correction = adf_gen2_enable_error_correction;
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hw_data->get_accel_mask = get_accel_mask;
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hw_data->get_ae_mask = get_ae_mask;
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hw_data->get_accel_cap = adf_gen2_get_accel_cap;
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hw_data->get_num_accels = adf_gen2_get_num_accels;
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hw_data->get_num_aes = adf_gen2_get_num_aes;
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hw_data->get_sram_bar_id = get_sram_bar_id;
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hw_data->get_etr_bar_id = get_etr_bar_id;
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hw_data->get_misc_bar_id = get_misc_bar_id;
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hw_data->get_admin_info = adf_gen2_get_admin_info;
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hw_data->get_arb_info = adf_gen2_get_arb_info;
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hw_data->get_sku = get_sku;
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hw_data->fw_name = ADF_C3XXX_FW;
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hw_data->fw_mmp_name = ADF_C3XXX_MMP;
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hw_data->init_admin_comms = adf_init_admin_comms;
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hw_data->exit_admin_comms = adf_exit_admin_comms;
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hw_data->configure_iov_threads = configure_iov_threads;
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hw_data->send_admin_init = adf_send_admin_init;
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hw_data->init_arb = adf_init_arb;
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hw_data->exit_arb = adf_exit_arb;
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hw_data->get_arb_mapping = adf_get_arbiter_mapping;
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hw_data->enable_ints = adf_gen2_enable_ints;
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hw_data->reset_device = adf_reset_flr;
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hw_data->set_ssm_wdtimer = adf_gen2_set_ssm_wdtimer;
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hw_data->disable_iov = adf_disable_sriov;
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adf_gen2_init_pf_pfvf_ops(&hw_data->pfvf_ops);
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adf_gen2_init_hw_csr_ops(&hw_data->csr_ops);
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}
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void adf_clean_hw_data_c3xxx(struct adf_hw_device_data *hw_data)
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{
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hw_data->dev_class->instances--;
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}
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