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8fdcb1704f
Register an 'nvdimm-bridge' device to act as an anchor for a libnvdimm bus hierarchy. Also, flesh out the cxl_bus definition to allow a cxl_nvdimm_bridge_driver to attach to the bridge and trigger the nvdimm-bus registration. The creation of the bridge is gated on the detection of a PMEM capable address space registered to the root. The bridge indirection allows the libnvdimm module to remain unloaded on platforms without PMEM support. Given that the probing of ACPI0017 is asynchronous to CXL endpoint devices, and the expectation that CXL endpoint devices register other PMEM resources on the 'CXL' nvdimm bus, a workqueue is added. The workqueue is needed to run bus_rescan_devices() outside of the device_lock() of the nvdimm-bridge device to rendezvous nvdimm resources as they arrive. For now only the bus is taken online/offline in the workqueue. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/162379909706.2993820.14051258608641140169.stgit@dwillia2-desk3.amr.corp.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
11 lines
307 B
Makefile
11 lines
307 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_CXL_BUS) += cxl_core.o
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obj-$(CONFIG_CXL_MEM) += cxl_pci.o
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obj-$(CONFIG_CXL_ACPI) += cxl_acpi.o
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obj-$(CONFIG_CXL_PMEM) += cxl_pmem.o
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ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE=CXL
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cxl_core-y := core.o
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cxl_pci-y := pci.o
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cxl_acpi-y := acpi.o
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cxl_pmem-y := pmem.o
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