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![Ingo Molnar](/assets/img/avatar_default.png)
This patch-queue improves the generic IRQ layer to be truly generic, by adding various abstractions and features to it, without impacting existing functionality. While the queue can be best described as "fix and improve everything in the generic IRQ layer that we could think of", and thus it consists of many smaller features and lots of cleanups, the one feature that stands out most is the new 'irq chip' abstraction. The irq-chip abstraction is about describing and coding and IRQ controller driver by mapping its raw hardware capabilities [and quirks, if needed] in a straightforward way, without having to think about "IRQ flow" (level/edge/etc.) type of details. This stands in contrast with the current 'irq-type' model of genirq architectures, which 'mixes' raw hardware capabilities with 'flow' details. The patchset supports both types of irq controller designs at once, and converts i386 and x86_64 to the new irq-chip design. As a bonus side-effect of the irq-chip approach, chained interrupt controllers (master/slave PIC constructs, etc.) are now supported by design as well. The end result of this patchset intends to be simpler architecture-level code and more consolidation between architectures. We reused many bits of code and many concepts from Russell King's ARM IRQ layer, the merging of which was one of the motivations for this patchset. This patch: rename desc->handler to desc->chip. Originally i did not want to do this, because it's a big patch. But having both "desc->handler", "desc->handle_irq" and "action->handler" caused a large degree of confusion and made the code appear alot less clean than it truly is. I have also attempted a dual approach as well by introducing a desc->chip alias - but that just wasnt robust enough and broke frequently. So lets get over with this quickly. The conversion was done automatically via scripts and converts all the code in the kernel. This renaming patch is the first one amongst the patches, so that the remaining patches can stay flexible and can be merged and split up without having some big monolithic patch act as a merge barrier. [akpm@osdl.org: build fix] [akpm@osdl.org: another build fix] Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
254 lines
5.8 KiB
C
254 lines
5.8 KiB
C
/*
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* Interrupt management for most GSC and related devices.
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*
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* (c) Copyright 1999 Alex deVries for The Puffin Group
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* (c) Copyright 1999 Grant Grundler for Hewlett-Packard
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* (c) Copyright 1999 Matthew Wilcox
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* (c) Copyright 2000 Helge Deller
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* (c) Copyright 2001 Matthew Wilcox for Hewlett-Packard
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/bitops.h>
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#include <linux/config.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include "gsc.h"
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#undef DEBUG
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#ifdef DEBUG
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#define DEBPRINTK printk
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#else
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#define DEBPRINTK(x,...)
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#endif
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int gsc_alloc_irq(struct gsc_irq *i)
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{
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int irq = txn_alloc_irq(GSC_EIM_WIDTH);
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if (irq < 0) {
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printk("cannot get irq\n");
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return irq;
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}
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i->txn_addr = txn_alloc_addr(irq);
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i->txn_data = txn_alloc_data(irq);
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i->irq = irq;
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return irq;
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}
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int gsc_claim_irq(struct gsc_irq *i, int irq)
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{
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int c = irq;
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irq += CPU_IRQ_BASE; /* virtualize the IRQ first */
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irq = txn_claim_irq(irq);
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if (irq < 0) {
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printk("cannot claim irq %d\n", c);
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return irq;
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}
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i->txn_addr = txn_alloc_addr(irq);
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i->txn_data = txn_alloc_data(irq);
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i->irq = irq;
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return irq;
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}
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EXPORT_SYMBOL(gsc_alloc_irq);
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EXPORT_SYMBOL(gsc_claim_irq);
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/* Common interrupt demultiplexer used by Asp, Lasi & Wax. */
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irqreturn_t gsc_asic_intr(int gsc_asic_irq, void *dev, struct pt_regs *regs)
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{
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unsigned long irr;
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struct gsc_asic *gsc_asic = dev;
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irr = gsc_readl(gsc_asic->hpa + OFFSET_IRR);
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if (irr == 0)
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return IRQ_NONE;
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DEBPRINTK("%s intr, mask=0x%x\n", gsc_asic->name, irr);
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do {
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int local_irq = __ffs(irr);
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unsigned int irq = gsc_asic->global_irq[local_irq];
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__do_IRQ(irq, regs);
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irr &= ~(1 << local_irq);
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} while (irr);
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return IRQ_HANDLED;
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}
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int gsc_find_local_irq(unsigned int irq, int *global_irqs, int limit)
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{
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int local_irq;
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for (local_irq = 0; local_irq < limit; local_irq++) {
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if (global_irqs[local_irq] == irq)
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return local_irq;
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}
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return NO_IRQ;
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}
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static void gsc_asic_disable_irq(unsigned int irq)
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{
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struct gsc_asic *irq_dev = irq_desc[irq].chip_data;
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int local_irq = gsc_find_local_irq(irq, irq_dev->global_irq, 32);
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u32 imr;
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DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __FUNCTION__, irq,
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irq_dev->name, imr);
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/* Disable the IRQ line by clearing the bit in the IMR */
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imr = gsc_readl(irq_dev->hpa + OFFSET_IMR);
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imr &= ~(1 << local_irq);
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gsc_writel(imr, irq_dev->hpa + OFFSET_IMR);
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}
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static void gsc_asic_enable_irq(unsigned int irq)
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{
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struct gsc_asic *irq_dev = irq_desc[irq].chip_data;
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int local_irq = gsc_find_local_irq(irq, irq_dev->global_irq, 32);
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u32 imr;
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DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __FUNCTION__, irq,
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irq_dev->name, imr);
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/* Enable the IRQ line by setting the bit in the IMR */
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imr = gsc_readl(irq_dev->hpa + OFFSET_IMR);
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imr |= 1 << local_irq;
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gsc_writel(imr, irq_dev->hpa + OFFSET_IMR);
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/*
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* FIXME: read IPR to make sure the IRQ isn't already pending.
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* If so, we need to read IRR and manually call do_irq().
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*/
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}
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static unsigned int gsc_asic_startup_irq(unsigned int irq)
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{
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gsc_asic_enable_irq(irq);
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return 0;
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}
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static struct hw_interrupt_type gsc_asic_interrupt_type = {
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.typename = "GSC-ASIC",
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.startup = gsc_asic_startup_irq,
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.shutdown = gsc_asic_disable_irq,
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.enable = gsc_asic_enable_irq,
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.disable = gsc_asic_disable_irq,
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.ack = no_ack_irq,
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.end = no_end_irq,
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};
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int gsc_assign_irq(struct hw_interrupt_type *type, void *data)
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{
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static int irq = GSC_IRQ_BASE;
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if (irq > GSC_IRQ_MAX)
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return NO_IRQ;
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irq_desc[irq].chip = type;
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irq_desc[irq].chip_data = data;
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return irq++;
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}
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void gsc_asic_assign_irq(struct gsc_asic *asic, int local_irq, int *irqp)
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{
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int irq = asic->global_irq[local_irq];
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if (irq <= 0) {
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irq = gsc_assign_irq(&gsc_asic_interrupt_type, asic);
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if (irq == NO_IRQ)
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return;
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asic->global_irq[local_irq] = irq;
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}
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*irqp = irq;
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}
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static struct device *next_device(struct klist_iter *i)
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{
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struct klist_node * n = klist_next(i);
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return n ? container_of(n, struct device, knode_parent) : NULL;
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}
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void gsc_fixup_irqs(struct parisc_device *parent, void *ctrl,
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void (*choose_irq)(struct parisc_device *, void *))
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{
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struct device *dev;
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struct klist_iter i;
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klist_iter_init(&parent->dev.klist_children, &i);
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while ((dev = next_device(&i))) {
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struct parisc_device *padev = to_parisc_device(dev);
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/* work-around for 715/64 and others which have parent
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at path [5] and children at path [5/0/x] */
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if (padev->id.hw_type == HPHW_FAULTY)
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return gsc_fixup_irqs(padev, ctrl, choose_irq);
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choose_irq(padev, ctrl);
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}
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klist_iter_exit(&i);
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}
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int gsc_common_setup(struct parisc_device *parent, struct gsc_asic *gsc_asic)
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{
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struct resource *res;
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int i;
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gsc_asic->gsc = parent;
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/* Initialise local irq -> global irq mapping */
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for (i = 0; i < 32; i++) {
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gsc_asic->global_irq[i] = NO_IRQ;
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}
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/* allocate resource region */
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res = request_mem_region(gsc_asic->hpa, 0x100000, gsc_asic->name);
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if (res) {
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res->flags = IORESOURCE_MEM; /* do not mark it busy ! */
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}
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#if 0
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printk(KERN_WARNING "%s IRQ %d EIM 0x%x", gsc_asic->name,
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parent->irq, gsc_asic->eim);
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if (gsc_readl(gsc_asic->hpa + OFFSET_IMR))
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printk(" IMR is non-zero! (0x%x)",
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gsc_readl(gsc_asic->hpa + OFFSET_IMR));
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printk("\n");
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#endif
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return 0;
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}
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extern struct parisc_driver lasi_driver;
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extern struct parisc_driver asp_driver;
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extern struct parisc_driver wax_driver;
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void __init gsc_init(void)
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{
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#ifdef CONFIG_GSC_LASI
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register_parisc_driver(&lasi_driver);
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register_parisc_driver(&asp_driver);
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#endif
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#ifdef CONFIG_GSC_WAX
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register_parisc_driver(&wax_driver);
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#endif
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}
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