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![Heiko Stuebner](/assets/img/avatar_default.png)
The timing values for dw-dsi are often dependent on the used display and according to Philippe Cornu will most likely also depend on the used phy technology in the soc-specific implementation. To solve this and allow specific implementations to define them as needed add a new get_timing callback to phy_ops and call this from the dphy_timing function to retrieve the necessary values for the specific mode. Right now this handles the hs2lp + lp2hs where Rockchip SoCs need handling according to the phy speed, while STM seems to be ok with static values. changes in v5: - rebase on 5.5-rc1 - merge into px30 dsi series to prevent ordering conflicts changes in v4: - rebase to make it directly fit on top of drm-misc-next after all changes in v3: - check existence of phy_ops->get_timing in __dw_mipi_dsi_probe() - emit actual error when get_timing() call fails - add tags from Philippe and Yannick changes in v2: - add driver-specific handling, don't force all bridge users to use the same timings, as suggested by Philippe Suggested-by: Philippe Cornu <philippe.cornu@st.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Philippe Cornu <philippe.cornu@st.com> Tested-by: Yannick Fertre <yannick.fertre@st.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191209143130.4553-2-heiko@sntech.de
69 lines
1.8 KiB
C
69 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) STMicroelectronics SA 2017
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*
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* Authors: Philippe Cornu <philippe.cornu@st.com>
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* Yannick Fertre <yannick.fertre@st.com>
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*/
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#ifndef __DW_MIPI_DSI__
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#define __DW_MIPI_DSI__
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#include <linux/types.h>
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#include <drm/drm_modes.h>
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struct drm_display_mode;
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struct drm_encoder;
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struct dw_mipi_dsi;
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struct mipi_dsi_device;
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struct platform_device;
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struct dw_mipi_dsi_dphy_timing {
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u16 data_hs2lp;
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u16 data_lp2hs;
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u16 clk_hs2lp;
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u16 clk_lp2hs;
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};
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struct dw_mipi_dsi_phy_ops {
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int (*init)(void *priv_data);
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void (*power_on)(void *priv_data);
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void (*power_off)(void *priv_data);
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int (*get_lane_mbps)(void *priv_data,
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const struct drm_display_mode *mode,
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unsigned long mode_flags, u32 lanes, u32 format,
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unsigned int *lane_mbps);
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int (*get_timing)(void *priv_data, unsigned int lane_mbps,
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struct dw_mipi_dsi_dphy_timing *timing);
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};
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struct dw_mipi_dsi_host_ops {
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int (*attach)(void *priv_data,
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struct mipi_dsi_device *dsi);
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int (*detach)(void *priv_data,
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struct mipi_dsi_device *dsi);
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};
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struct dw_mipi_dsi_plat_data {
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void __iomem *base;
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unsigned int max_data_lanes;
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enum drm_mode_status (*mode_valid)(void *priv_data,
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const struct drm_display_mode *mode);
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const struct dw_mipi_dsi_phy_ops *phy_ops;
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const struct dw_mipi_dsi_host_ops *host_ops;
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void *priv_data;
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};
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struct dw_mipi_dsi *dw_mipi_dsi_probe(struct platform_device *pdev,
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const struct dw_mipi_dsi_plat_data
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*plat_data);
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void dw_mipi_dsi_remove(struct dw_mipi_dsi *dsi);
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int dw_mipi_dsi_bind(struct dw_mipi_dsi *dsi, struct drm_encoder *encoder);
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void dw_mipi_dsi_unbind(struct dw_mipi_dsi *dsi);
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void dw_mipi_dsi_set_slave(struct dw_mipi_dsi *dsi, struct dw_mipi_dsi *slave);
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#endif /* __DW_MIPI_DSI__ */
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