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![Pieter Palmers](/assets/img/avatar_default.png)
This implements the simultaneous read of the isochronous cycle timer and the system clock (in usecs). This allows to express the exact receive time of an ISO packet as a system time with microsecond accuracy. http://bugzilla.kernel.org/show_bug.cgi?id=7773 The counterpart patch for libraw1394 can be found at http://thread.gmane.org/gmane.linux.kernel.firewire.devel/8934 Patch update (Stefan R.): Disable preemption and local interrupts. Prevent integer overflow. Add paranoid error checks and kerneldoc to hpsb_read_cycle_timer. Move it to other ieee1394_core high-level API functions. Change comments. Adjust whitespace. Rename struct _raw1394_cycle_timer. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de> Acked-by: Pieter Palmers <pieterp@joow.be> Acked-by: Dan Dennedy <dan@dennedy.org>
191 lines
5 KiB
C
191 lines
5 KiB
C
#ifndef IEEE1394_RAW1394_H
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#define IEEE1394_RAW1394_H
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/* header for the raw1394 API that is exported to user-space */
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#define RAW1394_KERNELAPI_VERSION 4
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/* state: opened */
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#define RAW1394_REQ_INITIALIZE 1
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/* state: initialized */
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#define RAW1394_REQ_LIST_CARDS 2
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#define RAW1394_REQ_SET_CARD 3
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/* state: connected */
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#define RAW1394_REQ_ASYNC_READ 100
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#define RAW1394_REQ_ASYNC_WRITE 101
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#define RAW1394_REQ_LOCK 102
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#define RAW1394_REQ_LOCK64 103
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#define RAW1394_REQ_ISO_SEND 104
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#define RAW1394_REQ_ASYNC_SEND 105
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#define RAW1394_REQ_ASYNC_STREAM 106
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#define RAW1394_REQ_ISO_LISTEN 200
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#define RAW1394_REQ_FCP_LISTEN 201
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#define RAW1394_REQ_RESET_BUS 202
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#define RAW1394_REQ_GET_ROM 203
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#define RAW1394_REQ_UPDATE_ROM 204
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#define RAW1394_REQ_ECHO 205
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#define RAW1394_REQ_MODIFY_ROM 206
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#define RAW1394_REQ_ARM_REGISTER 300
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#define RAW1394_REQ_ARM_UNREGISTER 301
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#define RAW1394_REQ_ARM_SET_BUF 302
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#define RAW1394_REQ_ARM_GET_BUF 303
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#define RAW1394_REQ_RESET_NOTIFY 400
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#define RAW1394_REQ_PHYPACKET 500
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/* kernel to user */
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#define RAW1394_REQ_BUS_RESET 10000
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#define RAW1394_REQ_ISO_RECEIVE 10001
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#define RAW1394_REQ_FCP_REQUEST 10002
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#define RAW1394_REQ_ARM 10003
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#define RAW1394_REQ_RAWISO_ACTIVITY 10004
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/* error codes */
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#define RAW1394_ERROR_NONE 0
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#define RAW1394_ERROR_COMPAT (-1001)
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#define RAW1394_ERROR_STATE_ORDER (-1002)
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#define RAW1394_ERROR_GENERATION (-1003)
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#define RAW1394_ERROR_INVALID_ARG (-1004)
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#define RAW1394_ERROR_MEMFAULT (-1005)
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#define RAW1394_ERROR_ALREADY (-1006)
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#define RAW1394_ERROR_EXCESSIVE (-1020)
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#define RAW1394_ERROR_UNTIDY_LEN (-1021)
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#define RAW1394_ERROR_SEND_ERROR (-1100)
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#define RAW1394_ERROR_ABORTED (-1101)
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#define RAW1394_ERROR_TIMEOUT (-1102)
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/* arm_codes */
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#define ARM_READ 1
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#define ARM_WRITE 2
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#define ARM_LOCK 4
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#define RAW1394_LONG_RESET 0
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#define RAW1394_SHORT_RESET 1
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/* busresetnotify ... */
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#define RAW1394_NOTIFY_OFF 0
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#define RAW1394_NOTIFY_ON 1
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#include <asm/types.h>
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struct raw1394_request {
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__u32 type;
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__s32 error;
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__u32 misc;
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__u32 generation;
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__u32 length;
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__u64 address;
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__u64 tag;
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__u64 sendb;
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__u64 recvb;
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};
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struct raw1394_khost_list {
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__u32 nodes;
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__u8 name[32];
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};
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typedef struct arm_request {
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__u16 destination_nodeid;
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__u16 source_nodeid;
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__u64 destination_offset;
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__u8 tlabel;
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__u8 tcode;
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__u8 extended_transaction_code;
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__u32 generation;
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__u16 buffer_length;
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__u8 __user *buffer;
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} *arm_request_t;
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typedef struct arm_response {
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__s32 response_code;
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__u16 buffer_length;
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__u8 __user *buffer;
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} *arm_response_t;
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typedef struct arm_request_response {
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struct arm_request __user *request;
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struct arm_response __user *response;
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} *arm_request_response_t;
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/* rawiso API */
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#include "ieee1394-ioctl.h"
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/* per-packet metadata embedded in the ringbuffer */
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/* must be identical to hpsb_iso_packet_info in iso.h! */
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struct raw1394_iso_packet_info {
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__u32 offset;
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__u16 len;
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__u16 cycle; /* recv only */
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__u8 channel; /* recv only */
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__u8 tag;
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__u8 sy;
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};
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/* argument for RAW1394_ISO_RECV/XMIT_PACKETS ioctls */
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struct raw1394_iso_packets {
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__u32 n_packets;
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struct raw1394_iso_packet_info __user *infos;
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};
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struct raw1394_iso_config {
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/* size of packet data buffer, in bytes (will be rounded up to PAGE_SIZE) */
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__u32 data_buf_size;
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/* # of packets to buffer */
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__u32 buf_packets;
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/* iso channel (set to -1 for multi-channel recv) */
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__s32 channel;
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/* xmit only - iso transmission speed */
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__u8 speed;
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/* The mode of the dma when receiving iso data. Must be supported by chip */
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__u8 dma_mode;
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/* max. latency of buffer, in packets (-1 if you don't care) */
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__s32 irq_interval;
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};
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/* argument to RAW1394_ISO_XMIT/RECV_INIT and RAW1394_ISO_GET_STATUS */
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struct raw1394_iso_status {
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/* current settings */
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struct raw1394_iso_config config;
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/* number of packets waiting to be filled with data (ISO transmission)
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or containing data received (ISO reception) */
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__u32 n_packets;
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/* approximate number of packets dropped due to overflow or
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underflow of the packet buffer (a value of zero guarantees
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that no packets have been dropped) */
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__u32 overflows;
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/* cycle number at which next packet will be transmitted;
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-1 if not known */
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__s16 xmit_cycle;
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};
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/* argument to RAW1394_IOC_GET_CYCLE_TIMER ioctl */
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struct raw1394_cycle_timer {
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/* contents of Isochronous Cycle Timer register,
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as in OHCI 1.1 clause 5.13 (also with non-OHCI hosts) */
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__u32 cycle_timer;
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/* local time in microseconds since Epoch,
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simultaneously read with cycle timer */
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__u64 local_time;
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};
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#endif /* IEEE1394_RAW1394_H */
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