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![Tejun Heo](/assets/img/avatar_default.png)
percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
241 lines
6.8 KiB
C
241 lines
6.8 KiB
C
/*
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* Intel SMP support routines.
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*
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* (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
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* (c) 1998-99, 2000, 2009 Ingo Molnar <mingo@redhat.com>
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* (c) 2002,2003 Andi Kleen, SuSE Labs.
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*
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* i386 and x86_64 integration by Glauber Costa <gcosta@redhat.com>
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*
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* This code is released under the GNU General Public License version 2 or
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* later.
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*/
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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#include <linux/kernel_stat.h>
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#include <linux/mc146818rtc.h>
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#include <linux/cache.h>
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#include <linux/interrupt.h>
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#include <linux/cpu.h>
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#include <linux/gfp.h>
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#include <asm/mtrr.h>
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#include <asm/tlbflush.h>
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#include <asm/mmu_context.h>
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#include <asm/proto.h>
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#include <asm/apic.h>
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/*
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* Some notes on x86 processor bugs affecting SMP operation:
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*
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* Pentium, Pentium Pro, II, III (and all CPUs) have bugs.
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* The Linux implications for SMP are handled as follows:
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*
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* Pentium III / [Xeon]
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* None of the E1AP-E3AP errata are visible to the user.
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*
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* E1AP. see PII A1AP
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* E2AP. see PII A2AP
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* E3AP. see PII A3AP
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*
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* Pentium II / [Xeon]
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* None of the A1AP-A3AP errata are visible to the user.
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*
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* A1AP. see PPro 1AP
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* A2AP. see PPro 2AP
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* A3AP. see PPro 7AP
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*
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* Pentium Pro
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* None of 1AP-9AP errata are visible to the normal user,
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* except occasional delivery of 'spurious interrupt' as trap #15.
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* This is very rare and a non-problem.
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*
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* 1AP. Linux maps APIC as non-cacheable
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* 2AP. worked around in hardware
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* 3AP. fixed in C0 and above steppings microcode update.
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* Linux does not use excessive STARTUP_IPIs.
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* 4AP. worked around in hardware
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* 5AP. symmetric IO mode (normal Linux operation) not affected.
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* 'noapic' mode has vector 0xf filled out properly.
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* 6AP. 'noapic' mode might be affected - fixed in later steppings
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* 7AP. We do not assume writes to the LVT deassering IRQs
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* 8AP. We do not enable low power mode (deep sleep) during MP bootup
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* 9AP. We do not use mixed mode
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*
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* Pentium
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* There is a marginal case where REP MOVS on 100MHz SMP
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* machines with B stepping processors can fail. XXX should provide
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* an L1cache=Writethrough or L1cache=off option.
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*
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* B stepping CPUs may hang. There are hardware work arounds
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* for this. We warn about it in case your board doesn't have the work
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* arounds. Basically that's so I can tell anyone with a B stepping
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* CPU and SMP problems "tough".
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*
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* Specific items [From Pentium Processor Specification Update]
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*
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* 1AP. Linux doesn't use remote read
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* 2AP. Linux doesn't trust APIC errors
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* 3AP. We work around this
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* 4AP. Linux never generated 3 interrupts of the same priority
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* to cause a lost local interrupt.
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* 5AP. Remote read is never used
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* 6AP. not affected - worked around in hardware
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* 7AP. not affected - worked around in hardware
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* 8AP. worked around in hardware - we get explicit CS errors if not
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* 9AP. only 'noapic' mode affected. Might generate spurious
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* interrupts, we log only the first one and count the
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* rest silently.
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* 10AP. not affected - worked around in hardware
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* 11AP. Linux reads the APIC between writes to avoid this, as per
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* the documentation. Make sure you preserve this as it affects
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* the C stepping chips too.
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* 12AP. not affected - worked around in hardware
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* 13AP. not affected - worked around in hardware
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* 14AP. we always deassert INIT during bootup
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* 15AP. not affected - worked around in hardware
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* 16AP. not affected - worked around in hardware
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* 17AP. not affected - worked around in hardware
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* 18AP. not affected - worked around in hardware
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* 19AP. not affected - worked around in BIOS
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*
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* If this sounds worrying believe me these bugs are either ___RARE___,
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* or are signal timing bugs worked around in hardware and there's
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* about nothing of note with C stepping upwards.
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*/
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/*
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* this function sends a 'reschedule' IPI to another CPU.
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* it goes straight through and wastes no time serializing
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* anything. Worst case is that we lose a reschedule ...
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*/
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static void native_smp_send_reschedule(int cpu)
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{
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if (unlikely(cpu_is_offline(cpu))) {
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WARN_ON(1);
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return;
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}
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apic->send_IPI_mask(cpumask_of(cpu), RESCHEDULE_VECTOR);
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}
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void native_send_call_func_single_ipi(int cpu)
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{
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apic->send_IPI_mask(cpumask_of(cpu), CALL_FUNCTION_SINGLE_VECTOR);
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}
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void native_send_call_func_ipi(const struct cpumask *mask)
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{
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cpumask_var_t allbutself;
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if (!alloc_cpumask_var(&allbutself, GFP_ATOMIC)) {
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apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
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return;
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}
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cpumask_copy(allbutself, cpu_online_mask);
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cpumask_clear_cpu(smp_processor_id(), allbutself);
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if (cpumask_equal(mask, allbutself) &&
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cpumask_equal(cpu_online_mask, cpu_callout_mask))
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apic->send_IPI_allbutself(CALL_FUNCTION_VECTOR);
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else
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apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
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free_cpumask_var(allbutself);
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}
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/*
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* this function calls the 'stop' function on all other CPUs in the system.
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*/
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asmlinkage void smp_reboot_interrupt(void)
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{
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ack_APIC_irq();
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irq_enter();
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stop_this_cpu(NULL);
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irq_exit();
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}
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static void native_smp_send_stop(void)
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{
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unsigned long flags;
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unsigned long wait;
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if (reboot_force)
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return;
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/*
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* Use an own vector here because smp_call_function
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* does lots of things not suitable in a panic situation.
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* On most systems we could also use an NMI here,
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* but there are a few systems around where NMI
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* is problematic so stay with an non NMI for now
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* (this implies we cannot stop CPUs spinning with irq off
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* currently)
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*/
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if (num_online_cpus() > 1) {
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apic->send_IPI_allbutself(REBOOT_VECTOR);
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/* Don't wait longer than a second */
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wait = USEC_PER_SEC;
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while (num_online_cpus() > 1 && wait--)
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udelay(1);
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}
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local_irq_save(flags);
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disable_local_APIC();
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local_irq_restore(flags);
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}
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/*
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* Reschedule call back. Nothing to do,
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* all the work is done automatically when
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* we return from the interrupt.
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*/
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void smp_reschedule_interrupt(struct pt_regs *regs)
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{
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ack_APIC_irq();
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inc_irq_stat(irq_resched_count);
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/*
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* KVM uses this interrupt to force a cpu out of guest mode
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*/
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}
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void smp_call_function_interrupt(struct pt_regs *regs)
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{
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ack_APIC_irq();
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irq_enter();
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generic_smp_call_function_interrupt();
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inc_irq_stat(irq_call_count);
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irq_exit();
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}
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void smp_call_function_single_interrupt(struct pt_regs *regs)
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{
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ack_APIC_irq();
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irq_enter();
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generic_smp_call_function_single_interrupt();
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inc_irq_stat(irq_call_count);
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irq_exit();
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}
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struct smp_ops smp_ops = {
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.smp_prepare_boot_cpu = native_smp_prepare_boot_cpu,
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.smp_prepare_cpus = native_smp_prepare_cpus,
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.smp_cpus_done = native_smp_cpus_done,
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.smp_send_stop = native_smp_send_stop,
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.smp_send_reschedule = native_smp_send_reschedule,
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.cpu_up = native_cpu_up,
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.cpu_die = native_cpu_die,
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.cpu_disable = native_cpu_disable,
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.play_dead = native_play_dead,
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.send_call_func_ipi = native_send_call_func_ipi,
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.send_call_func_single_ipi = native_send_call_func_single_ipi,
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};
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EXPORT_SYMBOL_GPL(smp_ops);
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