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![Tejun Heo](/assets/img/avatar_default.png)
percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
423 lines
10 KiB
C
423 lines
10 KiB
C
/*
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* SGI RTC clock/timer routines.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* Copyright (c) 2009 Silicon Graphics, Inc. All Rights Reserved.
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* Copyright (c) Dimitri Sivanich
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*/
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#include <linux/clockchips.h>
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#include <linux/slab.h>
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#include <asm/uv/uv_mmrs.h>
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#include <asm/uv/uv_hub.h>
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#include <asm/uv/bios.h>
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#include <asm/uv/uv.h>
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#include <asm/apic.h>
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#include <asm/cpu.h>
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#define RTC_NAME "sgi_rtc"
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static cycle_t uv_read_rtc(struct clocksource *cs);
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static int uv_rtc_next_event(unsigned long, struct clock_event_device *);
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static void uv_rtc_timer_setup(enum clock_event_mode,
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struct clock_event_device *);
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static struct clocksource clocksource_uv = {
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.name = RTC_NAME,
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.rating = 400,
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.read = uv_read_rtc,
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.mask = (cycle_t)UVH_RTC_REAL_TIME_CLOCK_MASK,
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.shift = 10,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static struct clock_event_device clock_event_device_uv = {
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.name = RTC_NAME,
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.features = CLOCK_EVT_FEAT_ONESHOT,
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.shift = 20,
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.rating = 400,
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.irq = -1,
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.set_next_event = uv_rtc_next_event,
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.set_mode = uv_rtc_timer_setup,
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.event_handler = NULL,
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};
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static DEFINE_PER_CPU(struct clock_event_device, cpu_ced);
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/* There is one of these allocated per node */
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struct uv_rtc_timer_head {
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spinlock_t lock;
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/* next cpu waiting for timer, local node relative: */
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int next_cpu;
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/* number of cpus on this node: */
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int ncpus;
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struct {
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int lcpu; /* systemwide logical cpu number */
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u64 expires; /* next timer expiration for this cpu */
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} cpu[1];
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};
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/*
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* Access to uv_rtc_timer_head via blade id.
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*/
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static struct uv_rtc_timer_head **blade_info __read_mostly;
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static int uv_rtc_evt_enable;
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/*
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* Hardware interface routines
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*/
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/* Send IPIs to another node */
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static void uv_rtc_send_IPI(int cpu)
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{
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unsigned long apicid, val;
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int pnode;
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apicid = cpu_physical_id(cpu);
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pnode = uv_apicid_to_pnode(apicid);
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val = (1UL << UVH_IPI_INT_SEND_SHFT) |
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(apicid << UVH_IPI_INT_APIC_ID_SHFT) |
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(X86_PLATFORM_IPI_VECTOR << UVH_IPI_INT_VECTOR_SHFT);
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uv_write_global_mmr64(pnode, UVH_IPI_INT, val);
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}
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/* Check for an RTC interrupt pending */
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static int uv_intr_pending(int pnode)
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{
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return uv_read_global_mmr64(pnode, UVH_EVENT_OCCURRED0) &
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UVH_EVENT_OCCURRED0_RTC1_MASK;
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}
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/* Setup interrupt and return non-zero if early expiration occurred. */
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static int uv_setup_intr(int cpu, u64 expires)
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{
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u64 val;
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int pnode = uv_cpu_to_pnode(cpu);
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uv_write_global_mmr64(pnode, UVH_RTC1_INT_CONFIG,
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UVH_RTC1_INT_CONFIG_M_MASK);
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uv_write_global_mmr64(pnode, UVH_INT_CMPB, -1L);
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uv_write_global_mmr64(pnode, UVH_EVENT_OCCURRED0_ALIAS,
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UVH_EVENT_OCCURRED0_RTC1_MASK);
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val = (X86_PLATFORM_IPI_VECTOR << UVH_RTC1_INT_CONFIG_VECTOR_SHFT) |
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((u64)cpu_physical_id(cpu) << UVH_RTC1_INT_CONFIG_APIC_ID_SHFT);
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/* Set configuration */
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uv_write_global_mmr64(pnode, UVH_RTC1_INT_CONFIG, val);
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/* Initialize comparator value */
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uv_write_global_mmr64(pnode, UVH_INT_CMPB, expires);
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if (uv_read_rtc(NULL) <= expires)
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return 0;
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return !uv_intr_pending(pnode);
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}
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/*
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* Per-cpu timer tracking routines
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*/
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static __init void uv_rtc_deallocate_timers(void)
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{
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int bid;
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for_each_possible_blade(bid) {
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kfree(blade_info[bid]);
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}
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kfree(blade_info);
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}
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/* Allocate per-node list of cpu timer expiration times. */
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static __init int uv_rtc_allocate_timers(void)
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{
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int cpu;
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blade_info = kmalloc(uv_possible_blades * sizeof(void *), GFP_KERNEL);
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if (!blade_info)
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return -ENOMEM;
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memset(blade_info, 0, uv_possible_blades * sizeof(void *));
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for_each_present_cpu(cpu) {
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int nid = cpu_to_node(cpu);
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int bid = uv_cpu_to_blade_id(cpu);
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int bcpu = uv_cpu_hub_info(cpu)->blade_processor_id;
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struct uv_rtc_timer_head *head = blade_info[bid];
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if (!head) {
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head = kmalloc_node(sizeof(struct uv_rtc_timer_head) +
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(uv_blade_nr_possible_cpus(bid) *
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2 * sizeof(u64)),
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GFP_KERNEL, nid);
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if (!head) {
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uv_rtc_deallocate_timers();
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return -ENOMEM;
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}
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spin_lock_init(&head->lock);
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head->ncpus = uv_blade_nr_possible_cpus(bid);
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head->next_cpu = -1;
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blade_info[bid] = head;
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}
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head->cpu[bcpu].lcpu = cpu;
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head->cpu[bcpu].expires = ULLONG_MAX;
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}
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return 0;
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}
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/* Find and set the next expiring timer. */
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static void uv_rtc_find_next_timer(struct uv_rtc_timer_head *head, int pnode)
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{
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u64 lowest = ULLONG_MAX;
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int c, bcpu = -1;
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head->next_cpu = -1;
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for (c = 0; c < head->ncpus; c++) {
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u64 exp = head->cpu[c].expires;
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if (exp < lowest) {
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bcpu = c;
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lowest = exp;
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}
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}
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if (bcpu >= 0) {
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head->next_cpu = bcpu;
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c = head->cpu[bcpu].lcpu;
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if (uv_setup_intr(c, lowest))
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/* If we didn't set it up in time, trigger */
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uv_rtc_send_IPI(c);
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} else {
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uv_write_global_mmr64(pnode, UVH_RTC1_INT_CONFIG,
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UVH_RTC1_INT_CONFIG_M_MASK);
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}
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}
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/*
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* Set expiration time for current cpu.
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*
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* Returns 1 if we missed the expiration time.
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*/
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static int uv_rtc_set_timer(int cpu, u64 expires)
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{
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int pnode = uv_cpu_to_pnode(cpu);
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int bid = uv_cpu_to_blade_id(cpu);
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struct uv_rtc_timer_head *head = blade_info[bid];
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int bcpu = uv_cpu_hub_info(cpu)->blade_processor_id;
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u64 *t = &head->cpu[bcpu].expires;
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unsigned long flags;
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int next_cpu;
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spin_lock_irqsave(&head->lock, flags);
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next_cpu = head->next_cpu;
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*t = expires;
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/* Will this one be next to go off? */
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if (next_cpu < 0 || bcpu == next_cpu ||
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expires < head->cpu[next_cpu].expires) {
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head->next_cpu = bcpu;
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if (uv_setup_intr(cpu, expires)) {
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*t = ULLONG_MAX;
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uv_rtc_find_next_timer(head, pnode);
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spin_unlock_irqrestore(&head->lock, flags);
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return -ETIME;
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}
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}
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spin_unlock_irqrestore(&head->lock, flags);
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return 0;
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}
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/*
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* Unset expiration time for current cpu.
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*
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* Returns 1 if this timer was pending.
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*/
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static int uv_rtc_unset_timer(int cpu, int force)
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{
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int pnode = uv_cpu_to_pnode(cpu);
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int bid = uv_cpu_to_blade_id(cpu);
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struct uv_rtc_timer_head *head = blade_info[bid];
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int bcpu = uv_cpu_hub_info(cpu)->blade_processor_id;
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u64 *t = &head->cpu[bcpu].expires;
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unsigned long flags;
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int rc = 0;
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spin_lock_irqsave(&head->lock, flags);
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if ((head->next_cpu == bcpu && uv_read_rtc(NULL) >= *t) || force)
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rc = 1;
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if (rc) {
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*t = ULLONG_MAX;
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/* Was the hardware setup for this timer? */
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if (head->next_cpu == bcpu)
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uv_rtc_find_next_timer(head, pnode);
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}
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spin_unlock_irqrestore(&head->lock, flags);
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return rc;
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}
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/*
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* Kernel interface routines.
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*/
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/*
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* Read the RTC.
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*
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* Starting with HUB rev 2.0, the UV RTC register is replicated across all
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* cachelines of it's own page. This allows faster simultaneous reads
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* from a given socket.
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*/
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static cycle_t uv_read_rtc(struct clocksource *cs)
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{
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unsigned long offset;
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if (uv_get_min_hub_revision_id() == 1)
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offset = 0;
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else
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offset = (uv_blade_processor_id() * L1_CACHE_BYTES) % PAGE_SIZE;
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return (cycle_t)uv_read_local_mmr(UVH_RTC | offset);
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}
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/*
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* Program the next event, relative to now
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*/
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static int uv_rtc_next_event(unsigned long delta,
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struct clock_event_device *ced)
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{
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int ced_cpu = cpumask_first(ced->cpumask);
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return uv_rtc_set_timer(ced_cpu, delta + uv_read_rtc(NULL));
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}
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/*
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* Setup the RTC timer in oneshot mode
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*/
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static void uv_rtc_timer_setup(enum clock_event_mode mode,
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struct clock_event_device *evt)
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{
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int ced_cpu = cpumask_first(evt->cpumask);
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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case CLOCK_EVT_MODE_ONESHOT:
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case CLOCK_EVT_MODE_RESUME:
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/* Nothing to do here yet */
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break;
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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uv_rtc_unset_timer(ced_cpu, 1);
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break;
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}
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}
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static void uv_rtc_interrupt(void)
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{
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int cpu = smp_processor_id();
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struct clock_event_device *ced = &per_cpu(cpu_ced, cpu);
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if (!ced || !ced->event_handler)
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return;
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if (uv_rtc_unset_timer(cpu, 0) != 1)
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return;
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ced->event_handler(ced);
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}
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static int __init uv_enable_evt_rtc(char *str)
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{
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uv_rtc_evt_enable = 1;
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return 1;
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}
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__setup("uvrtcevt", uv_enable_evt_rtc);
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static __init void uv_rtc_register_clockevents(struct work_struct *dummy)
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{
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struct clock_event_device *ced = &__get_cpu_var(cpu_ced);
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*ced = clock_event_device_uv;
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ced->cpumask = cpumask_of(smp_processor_id());
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clockevents_register_device(ced);
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}
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static __init int uv_rtc_setup_clock(void)
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{
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int rc;
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if (!is_uv_system())
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return -ENODEV;
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clocksource_uv.mult = clocksource_hz2mult(sn_rtc_cycles_per_second,
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clocksource_uv.shift);
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/* If single blade, prefer tsc */
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if (uv_num_possible_blades() == 1)
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clocksource_uv.rating = 250;
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rc = clocksource_register(&clocksource_uv);
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if (rc)
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printk(KERN_INFO "UV RTC clocksource failed rc %d\n", rc);
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else
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printk(KERN_INFO "UV RTC clocksource registered freq %lu MHz\n",
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sn_rtc_cycles_per_second/(unsigned long)1E6);
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if (rc || !uv_rtc_evt_enable || x86_platform_ipi_callback)
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return rc;
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/* Setup and register clockevents */
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rc = uv_rtc_allocate_timers();
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if (rc)
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goto error;
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x86_platform_ipi_callback = uv_rtc_interrupt;
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clock_event_device_uv.mult = div_sc(sn_rtc_cycles_per_second,
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NSEC_PER_SEC, clock_event_device_uv.shift);
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clock_event_device_uv.min_delta_ns = NSEC_PER_SEC /
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sn_rtc_cycles_per_second;
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clock_event_device_uv.max_delta_ns = clocksource_uv.mask *
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(NSEC_PER_SEC / sn_rtc_cycles_per_second);
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rc = schedule_on_each_cpu(uv_rtc_register_clockevents);
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if (rc) {
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x86_platform_ipi_callback = NULL;
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uv_rtc_deallocate_timers();
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goto error;
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}
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printk(KERN_INFO "UV RTC clockevents registered\n");
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return 0;
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error:
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clocksource_unregister(&clocksource_uv);
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printk(KERN_INFO "UV RTC clockevents failed rc %d\n", rc);
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return rc;
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}
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arch_initcall(uv_rtc_setup_clock);
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