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The Pulse Density Modulation Interface Controller (PDMC) is a PDM interface controller and decoder that support PDM format. It integrates a clock generator driving the PDM microphone and embeds filters which decimate the incoming bit stream to obtain most common audio rates. Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> Signed-off-by: Mark Brown <broonie@kernel.org>
83 lines
2.4 KiB
C
83 lines
2.4 KiB
C
/*
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* Rockchip PDM ALSA SoC Digital Audio Interface(DAI) driver
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*
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* Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef _ROCKCHIP_PDM_H
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#define _ROCKCHIP_PDM_H
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/* PDM REGS */
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#define PDM_SYSCONFIG (0x0000)
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#define PDM_CTRL0 (0x0004)
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#define PDM_CTRL1 (0x0008)
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#define PDM_CLK_CTRL (0x000c)
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#define PDM_HPF_CTRL (0x0010)
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#define PDM_FIFO_CTRL (0x0014)
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#define PDM_DMA_CTRL (0x0018)
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#define PDM_INT_EN (0x001c)
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#define PDM_INT_CLR (0x0020)
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#define PDM_INT_ST (0x0024)
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#define PDM_RXFIFO_DATA (0x0030)
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#define PDM_DATA_VALID (0x0054)
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#define PDM_VERSION (0x0058)
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/* PDM_SYSCONFIG */
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#define PDM_RX_MASK (0x1 << 2)
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#define PDM_RX_START (0x1 << 2)
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#define PDM_RX_STOP (0x0 << 2)
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#define PDM_RX_CLR_MASK (0x1 << 0)
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#define PDM_RX_CLR_WR (0x1 << 0)
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#define PDM_RX_CLR_DONE (0x0 << 0)
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/* PDM CTRL0 */
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#define PDM_PATH_MSK (0xf << 27)
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#define PDM_PATH3_EN BIT(30)
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#define PDM_PATH2_EN BIT(29)
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#define PDM_PATH1_EN BIT(28)
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#define PDM_PATH0_EN BIT(27)
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#define PDM_HWT_EN BIT(26)
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#define PDM_VDW_MSK (0x1f << 0)
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#define PDM_VDW(X) ((X - 1) << 0)
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/* PDM CLK CTRL */
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#define PDM_CLK_MSK BIT(5)
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#define PDM_CLK_EN BIT(5)
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#define PDM_CLK_DIS (0x0 << 5)
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#define PDM_CKP_MSK BIT(3)
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#define PDM_CKP_NORMAL (0x0 << 3)
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#define PDM_CKP_INVERTED BIT(3)
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#define PDM_DS_RATIO_MSK (0x7 << 0)
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#define PDM_CLK_320FS (0x0 << 0)
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#define PDM_CLK_640FS (0x1 << 0)
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#define PDM_CLK_1280FS (0x2 << 0)
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#define PDM_CLK_2560FS (0x3 << 0)
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#define PDM_CLK_5120FS (0x4 << 0)
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/* PDM HPF CTRL */
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#define PDM_HPF_LE BIT(3)
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#define PDM_HPF_RE BIT(2)
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#define PDM_HPF_CF_MSK (0x3 << 0)
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#define PDM_HPF_3P79HZ (0x0 << 0)
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#define PDM_HPF_60HZ (0x1 << 0)
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#define PDM_HPF_243HZ (0x2 << 0)
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#define PDM_HPF_493HZ (0x3 << 0)
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/* PDM DMA CTRL */
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#define PDM_DMA_RD_MSK BIT(8)
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#define PDM_DMA_RD_EN BIT(8)
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#define PDM_DMA_RD_DIS (0x0 << 8)
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#define PDM_DMA_RDL_MSK (0x7f << 0)
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#define PDM_DMA_RDL(X) ((X - 1) << 0)
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#endif /* _ROCKCHIP_PDM_H */
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