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0b32928528
On SAM9X60, slewrate should be enabled on pins with a switching frequency below 50Mhz. Since most of our pins do not exceed this value, we enable slewrate by default. Pins with a switching value that exceeds 50Mhz will have to explicitly disable slewrate. This patch changes the ABI. However, the slewrate macros are only used by SAM9X60 and, at this moment, there are no device-tree files available for this platform. Suggested-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20191101092031.24896-1-codrin.ciubotariu@microchip.com Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
49 lines
1.5 KiB
C
49 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* This header provides constants for most at91 pinctrl bindings.
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*
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* Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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*/
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#ifndef __DT_BINDINGS_AT91_PINCTRL_H__
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#define __DT_BINDINGS_AT91_PINCTRL_H__
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#define AT91_PINCTRL_NONE (0 << 0)
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#define AT91_PINCTRL_PULL_UP (1 << 0)
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#define AT91_PINCTRL_MULTI_DRIVE (1 << 1)
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#define AT91_PINCTRL_DEGLITCH (1 << 2)
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#define AT91_PINCTRL_PULL_DOWN (1 << 3)
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#define AT91_PINCTRL_DIS_SCHMIT (1 << 4)
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#define AT91_PINCTRL_OUTPUT (1 << 7)
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#define AT91_PINCTRL_OUTPUT_VAL(x) ((x & 0x1) << 8)
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#define AT91_PINCTRL_SLEWRATE (1 << 9)
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#define AT91_PINCTRL_DEBOUNCE (1 << 16)
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#define AT91_PINCTRL_DEBOUNCE_VAL(x) (x << 17)
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#define AT91_PINCTRL_PULL_UP_DEGLITCH (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DEGLITCH)
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#define AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT (0x0 << 5)
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#define AT91_PINCTRL_DRIVE_STRENGTH_LOW (0x1 << 5)
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#define AT91_PINCTRL_DRIVE_STRENGTH_MED (0x2 << 5)
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#define AT91_PINCTRL_DRIVE_STRENGTH_HI (0x3 << 5)
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#define AT91_PINCTRL_SLEWRATE_ENA (0x0 << 9)
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#define AT91_PINCTRL_SLEWRATE_DIS (0x1 << 9)
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#define AT91_PIOA 0
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#define AT91_PIOB 1
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#define AT91_PIOC 2
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#define AT91_PIOD 3
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#define AT91_PIOE 4
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#define AT91_PERIPH_GPIO 0
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#define AT91_PERIPH_A 1
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#define AT91_PERIPH_B 2
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#define AT91_PERIPH_C 3
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#define AT91_PERIPH_D 4
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#define ATMEL_PIO_DRVSTR_LO 1
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#define ATMEL_PIO_DRVSTR_ME 2
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#define ATMEL_PIO_DRVSTR_HI 3
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#endif /* __DT_BINDINGS_AT91_PINCTRL_H__ */
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