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Document the PMC pinctrl bindings for pad power state and signaling voltage configuration. Both nvidia,tegra186-pmc.txt and nvidia,tegra20-pmc.txt are modified as they both cover SoC generations for which these bindings apply. Add a header defining Tegra PMC pad voltage configurations. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
18 lines
482 B
C
18 lines
482 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* pinctrl-tegra-io-pad.h: Tegra I/O pad source voltage configuration constants
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* pinctrl bindings.
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*
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* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Author: Aapo Vienamo <avienamo@nvidia.com>
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*/
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#ifndef _DT_BINDINGS_PINCTRL_TEGRA_IO_PAD_H
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#define _DT_BINDINGS_PINCTRL_TEGRA_IO_PAD_H
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/* Voltage levels of the I/O pad's source rail */
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#define TEGRA_IO_PAD_VOLTAGE_1V8 0
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#define TEGRA_IO_PAD_VOLTAGE_3V3 1
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#endif
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