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97d485edc1
Add bindings for the AHB bus which exposes the SSC (Snapdragon Sensor Core) block in the global address space. This bus (and the SSC block itself) is present on certain qcom SoCs. In typical configuration, this bus (as some of the clocks and registers that we need to manipulate) is not accessible to Linux, and the resources on this bus are indirectly accessed by communicating with a hexagon CPU core residing in the SSC block. In this configuration, the hypervisor is the one performing the bus initialization for the purposes of bringing the hexagon CPU core out of reset. However, it is possible to change the configuration, in which case this driver will initialize the bus. In combination with drivers for resources on the SSC bus, this driver can aid in debugging, and for example with a TLMM driver can be used to directly access SSC-dedicated GPIO pins, removing the need to commit to a particular usecase during hw design. Finally, until open firmware for the hexagon core is available, this approach allows for using sensors hooked up to SSC-dedicated GPIO pins on mainline Linux simply by utilizing the existing in-tree drivers for these sensors. Signed-off-by: Michael Srba <Michael.Srba@seznam.cz> Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220411072156.24451-5-michael.srba@seznam.cz
43 lines
1.3 KiB
Makefile
43 lines
1.3 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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#
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# Makefile for the bus drivers.
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#
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# Interconnect bus drivers for ARM platforms
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obj-$(CONFIG_ARM_CCI) += arm-cci.o
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obj-$(CONFIG_ARM_INTEGRATOR_LM) += arm-integrator-lm.o
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obj-$(CONFIG_HISILICON_LPC) += hisi_lpc.o
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obj-$(CONFIG_BRCMSTB_GISB_ARB) += brcmstb_gisb.o
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obj-$(CONFIG_MOXTET) += moxtet.o
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# DPAA2 fsl-mc bus
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obj-$(CONFIG_FSL_MC_BUS) += fsl-mc/
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obj-$(CONFIG_BT1_APB) += bt1-apb.o
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obj-$(CONFIG_BT1_AXI) += bt1-axi.o
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obj-$(CONFIG_IMX_WEIM) += imx-weim.o
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obj-$(CONFIG_INTEL_IXP4XX_EB) += intel-ixp4xx-eb.o
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obj-$(CONFIG_MIPS_CDMM) += mips_cdmm.o
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obj-$(CONFIG_MVEBU_MBUS) += mvebu-mbus.o
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# Interconnect bus driver for OMAP SoCs.
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obj-$(CONFIG_OMAP_INTERCONNECT) += omap_l3_smx.o omap_l3_noc.o
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obj-$(CONFIG_OMAP_OCP2SCP) += omap-ocp2scp.o
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obj-$(CONFIG_QCOM_EBI2) += qcom-ebi2.o
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obj-$(CONFIG_QCOM_SSC_BLOCK_BUS) += qcom-ssc-block-bus.o
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obj-$(CONFIG_SUN50I_DE2_BUS) += sun50i-de2.o
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obj-$(CONFIG_SUNXI_RSB) += sunxi-rsb.o
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obj-$(CONFIG_OF) += simple-pm-bus.o
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obj-$(CONFIG_TEGRA_ACONNECT) += tegra-aconnect.o
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obj-$(CONFIG_TEGRA_GMI) += tegra-gmi.o
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obj-$(CONFIG_TI_PWMSS) += ti-pwmss.o
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obj-$(CONFIG_TI_SYSC) += ti-sysc.o
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obj-$(CONFIG_TS_NBUS) += ts-nbus.o
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obj-$(CONFIG_UNIPHIER_SYSTEM_BUS) += uniphier-system-bus.o
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obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress-config.o
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obj-$(CONFIG_DA8XX_MSTPRI) += da8xx-mstpri.o
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# MHI
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obj-y += mhi/
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