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c4e05443b6
In accordance with the way the MIPS platform is normally design there are
only six clock sources which need to be available on the kernel start in
order to one end up booting correctly:
+ CPU PLL: needed by the r4k and MIPS GIC timer drivers. The former one is
initialized by the arch code, while the later one is implemented in the
mips-gic-timer.c driver as the OF-declared timer.
+ PCIe PLL: required as a parental clock source for the APB/timer domains.
+ APB clock: needed in order to access all the SoC CSRs at least for the
timer OF-declared drivers.
+ APB Timer{0-2} clocks: these are the DW APB timers which drivers
dw_apb_timer_of.c are implemented as the OF-declared timers.
So as long as the clocks above are available early the kernel will
normally work. Let's convert the Baikal-T1 CCU drivers to the platform
device drivers keeping that in mind.
Generally speaking the conversion isn't that complicated since the driver
infrastructure has been designed as flexible enough for that. First we
need to add a new PLL/Divider clock features flag which indicates the
corresponding clock source as a basic one and that clock sources will be
available on the kernel early boot stages. Second the internal PLL/Divider
descriptors need to be initialized with -EPROBE_DEFER value as the
corresponding clock source is unavailable at the early stages. They will
be allocated and initialized on the Baikal-T1 clock platform driver probe
procedure. Finally the already available PLL/Divider init functions need
to be split up into two ones: init procedure performed in the framework of
the OF-declared clock initialization (of_clk_init()), and the probe
procedure called by the platform devices bus driver. Note the later method
will just continue the system clocks initialization started in the former
one.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Link: https://lore.kernel.org/r/20220929225402.9696-9-Sergey.Semin@baikalelectronics.ru
[sboyd@kernel.org: Remove module things because the Kconfig is still
bool]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
72 lines
1.8 KiB
C
72 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
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*
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* Baikal-T1 CCU PLL interface driver
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*/
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#ifndef __CLK_BT1_CCU_PLL_H__
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#define __CLK_BT1_CCU_PLL_H__
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#include <linux/clk-provider.h>
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#include <linux/spinlock.h>
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#include <linux/regmap.h>
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#include <linux/bits.h>
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#include <linux/of.h>
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/*
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* CCU PLL private flags
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* @CCU_PLL_BASIC: Basic PLL required by the kernel as early as possible.
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*/
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#define CCU_PLL_BASIC BIT(0)
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/*
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* struct ccu_pll_init_data - CCU PLL initialization data
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* @id: Clock private identifier.
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* @name: Clocks name.
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* @parent_name: Clocks parent name in a fw node.
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* @base: PLL registers base address with respect to the sys_regs base.
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* @sys_regs: Baikal-T1 System Controller registers map.
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* @np: Pointer to the node describing the CCU PLLs.
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* @flags: PLL clock flags.
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* @features: PLL private features.
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*/
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struct ccu_pll_init_data {
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unsigned int id;
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const char *name;
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const char *parent_name;
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unsigned int base;
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struct regmap *sys_regs;
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struct device_node *np;
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unsigned long flags;
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unsigned long features;
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};
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/*
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* struct ccu_pll - CCU PLL descriptor
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* @hw: clk_hw of the PLL.
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* @id: Clock private identifier.
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* @reg_ctl: PLL control register base.
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* @reg_ctl1: PLL control1 register base.
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* @sys_regs: Baikal-T1 System Controller registers map.
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* @lock: PLL state change spin-lock.
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*/
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struct ccu_pll {
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struct clk_hw hw;
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unsigned int id;
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unsigned int reg_ctl;
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unsigned int reg_ctl1;
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struct regmap *sys_regs;
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spinlock_t lock;
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};
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#define to_ccu_pll(_hw) container_of(_hw, struct ccu_pll, hw)
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static inline struct clk_hw *ccu_pll_get_clk_hw(struct ccu_pll *pll)
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{
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return pll ? &pll->hw : NULL;
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}
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struct ccu_pll *ccu_pll_hw_register(const struct ccu_pll_init_data *init);
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void ccu_pll_hw_unregister(struct ccu_pll *pll);
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#endif /* __CLK_BT1_CCU_PLL_H__ */
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