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![Sukrut Bellary](/assets/img/avatar_default.png)
smatch warning: drivers/devfreq/mtk-cci-devfreq.c:135 mtk_ccifreq_target() warn: variable dereferenced before check 'drv' (see line 130) This is based on static analysis only. Compilation tested. Signed-off-by: Sukrut Bellary <sukrut.bellary@linux.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
445 lines
11 KiB
C
445 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2022 MediaTek Inc.
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*/
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#include <linux/clk.h>
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#include <linux/devfreq.h>
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#include <linux/minmax.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_opp.h>
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#include <linux/regulator/consumer.h>
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struct mtk_ccifreq_platform_data {
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int min_volt_shift;
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int max_volt_shift;
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int proc_max_volt;
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int sram_min_volt;
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int sram_max_volt;
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};
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struct mtk_ccifreq_drv {
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struct device *dev;
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struct devfreq *devfreq;
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struct regulator *proc_reg;
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struct regulator *sram_reg;
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struct clk *cci_clk;
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struct clk *inter_clk;
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int inter_voltage;
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unsigned long pre_freq;
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/* Avoid race condition for regulators between notify and policy */
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struct mutex reg_lock;
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struct notifier_block opp_nb;
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const struct mtk_ccifreq_platform_data *soc_data;
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int vtrack_max;
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};
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static int mtk_ccifreq_set_voltage(struct mtk_ccifreq_drv *drv, int new_voltage)
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{
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const struct mtk_ccifreq_platform_data *soc_data = drv->soc_data;
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struct device *dev = drv->dev;
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int pre_voltage, pre_vsram, new_vsram, vsram, voltage, ret;
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int retry_max = drv->vtrack_max;
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if (!drv->sram_reg) {
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ret = regulator_set_voltage(drv->proc_reg, new_voltage,
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drv->soc_data->proc_max_volt);
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return ret;
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}
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pre_voltage = regulator_get_voltage(drv->proc_reg);
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if (pre_voltage < 0) {
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dev_err(dev, "invalid vproc value: %d\n", pre_voltage);
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return pre_voltage;
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}
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pre_vsram = regulator_get_voltage(drv->sram_reg);
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if (pre_vsram < 0) {
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dev_err(dev, "invalid vsram value: %d\n", pre_vsram);
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return pre_vsram;
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}
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new_vsram = clamp(new_voltage + soc_data->min_volt_shift,
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soc_data->sram_min_volt, soc_data->sram_max_volt);
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do {
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if (pre_voltage <= new_voltage) {
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vsram = clamp(pre_voltage + soc_data->max_volt_shift,
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soc_data->sram_min_volt, new_vsram);
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ret = regulator_set_voltage(drv->sram_reg, vsram,
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soc_data->sram_max_volt);
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if (ret)
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return ret;
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if (vsram == soc_data->sram_max_volt ||
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new_vsram == soc_data->sram_min_volt)
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voltage = new_voltage;
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else
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voltage = vsram - soc_data->min_volt_shift;
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ret = regulator_set_voltage(drv->proc_reg, voltage,
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soc_data->proc_max_volt);
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if (ret) {
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regulator_set_voltage(drv->sram_reg, pre_vsram,
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soc_data->sram_max_volt);
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return ret;
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}
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} else if (pre_voltage > new_voltage) {
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voltage = max(new_voltage,
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pre_vsram - soc_data->max_volt_shift);
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ret = regulator_set_voltage(drv->proc_reg, voltage,
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soc_data->proc_max_volt);
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if (ret)
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return ret;
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if (voltage == new_voltage)
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vsram = new_vsram;
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else
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vsram = max(new_vsram,
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voltage + soc_data->min_volt_shift);
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ret = regulator_set_voltage(drv->sram_reg, vsram,
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soc_data->sram_max_volt);
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if (ret) {
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regulator_set_voltage(drv->proc_reg, pre_voltage,
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soc_data->proc_max_volt);
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return ret;
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}
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}
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pre_voltage = voltage;
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pre_vsram = vsram;
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if (--retry_max < 0) {
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dev_err(dev,
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"over loop count, failed to set voltage\n");
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return -EINVAL;
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}
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} while (voltage != new_voltage || vsram != new_vsram);
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return 0;
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}
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static int mtk_ccifreq_target(struct device *dev, unsigned long *freq,
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u32 flags)
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{
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struct mtk_ccifreq_drv *drv = dev_get_drvdata(dev);
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struct clk *cci_pll;
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struct dev_pm_opp *opp;
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unsigned long opp_rate;
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int voltage, pre_voltage, inter_voltage, target_voltage, ret;
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if (!drv)
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return -EINVAL;
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if (drv->pre_freq == *freq)
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return 0;
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inter_voltage = drv->inter_voltage;
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cci_pll = clk_get_parent(drv->cci_clk);
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opp_rate = *freq;
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opp = devfreq_recommended_opp(dev, &opp_rate, 1);
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if (IS_ERR(opp)) {
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dev_err(dev, "failed to find opp for freq: %ld\n", opp_rate);
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return PTR_ERR(opp);
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}
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mutex_lock(&drv->reg_lock);
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voltage = dev_pm_opp_get_voltage(opp);
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dev_pm_opp_put(opp);
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pre_voltage = regulator_get_voltage(drv->proc_reg);
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if (pre_voltage < 0) {
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dev_err(dev, "invalid vproc value: %d\n", pre_voltage);
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ret = pre_voltage;
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goto out_unlock;
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}
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/* scale up: set voltage first then freq. */
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target_voltage = max(inter_voltage, voltage);
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if (pre_voltage <= target_voltage) {
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ret = mtk_ccifreq_set_voltage(drv, target_voltage);
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if (ret) {
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dev_err(dev, "failed to scale up voltage\n");
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goto out_restore_voltage;
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}
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}
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/* switch the cci clock to intermediate clock source. */
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ret = clk_set_parent(drv->cci_clk, drv->inter_clk);
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if (ret) {
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dev_err(dev, "failed to re-parent cci clock\n");
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goto out_restore_voltage;
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}
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/* set the original clock to target rate. */
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ret = clk_set_rate(cci_pll, *freq);
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if (ret) {
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dev_err(dev, "failed to set cci pll rate: %d\n", ret);
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clk_set_parent(drv->cci_clk, cci_pll);
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goto out_restore_voltage;
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}
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/* switch the cci clock back to the original clock source. */
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ret = clk_set_parent(drv->cci_clk, cci_pll);
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if (ret) {
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dev_err(dev, "failed to re-parent cci clock\n");
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mtk_ccifreq_set_voltage(drv, inter_voltage);
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goto out_unlock;
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}
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/*
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* If the new voltage is lower than the intermediate voltage or the
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* original voltage, scale down to the new voltage.
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*/
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if (voltage < inter_voltage || voltage < pre_voltage) {
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ret = mtk_ccifreq_set_voltage(drv, voltage);
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if (ret) {
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dev_err(dev, "failed to scale down voltage\n");
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goto out_unlock;
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}
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}
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drv->pre_freq = *freq;
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mutex_unlock(&drv->reg_lock);
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return 0;
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out_restore_voltage:
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mtk_ccifreq_set_voltage(drv, pre_voltage);
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out_unlock:
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mutex_unlock(&drv->reg_lock);
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return ret;
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}
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static int mtk_ccifreq_opp_notifier(struct notifier_block *nb,
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unsigned long event, void *data)
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{
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struct dev_pm_opp *opp = data;
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struct mtk_ccifreq_drv *drv;
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unsigned long freq, volt;
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drv = container_of(nb, struct mtk_ccifreq_drv, opp_nb);
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if (event == OPP_EVENT_ADJUST_VOLTAGE) {
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freq = dev_pm_opp_get_freq(opp);
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mutex_lock(&drv->reg_lock);
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/* current opp item is changed */
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if (freq == drv->pre_freq) {
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volt = dev_pm_opp_get_voltage(opp);
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mtk_ccifreq_set_voltage(drv, volt);
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}
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mutex_unlock(&drv->reg_lock);
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}
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return 0;
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}
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static struct devfreq_dev_profile mtk_ccifreq_profile = {
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.target = mtk_ccifreq_target,
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};
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static int mtk_ccifreq_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct mtk_ccifreq_drv *drv;
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struct devfreq_passive_data *passive_data;
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struct dev_pm_opp *opp;
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unsigned long rate, opp_volt;
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int ret;
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drv = devm_kzalloc(dev, sizeof(*drv), GFP_KERNEL);
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if (!drv)
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return -ENOMEM;
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drv->dev = dev;
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drv->soc_data = (const struct mtk_ccifreq_platform_data *)
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of_device_get_match_data(&pdev->dev);
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mutex_init(&drv->reg_lock);
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platform_set_drvdata(pdev, drv);
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drv->cci_clk = devm_clk_get(dev, "cci");
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if (IS_ERR(drv->cci_clk)) {
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ret = PTR_ERR(drv->cci_clk);
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return dev_err_probe(dev, ret, "failed to get cci clk\n");
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}
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drv->inter_clk = devm_clk_get(dev, "intermediate");
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if (IS_ERR(drv->inter_clk)) {
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ret = PTR_ERR(drv->inter_clk);
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return dev_err_probe(dev, ret,
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"failed to get intermediate clk\n");
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}
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drv->proc_reg = devm_regulator_get_optional(dev, "proc");
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if (IS_ERR(drv->proc_reg)) {
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ret = PTR_ERR(drv->proc_reg);
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return dev_err_probe(dev, ret,
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"failed to get proc regulator\n");
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}
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ret = regulator_enable(drv->proc_reg);
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if (ret) {
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dev_err(dev, "failed to enable proc regulator\n");
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return ret;
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}
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drv->sram_reg = devm_regulator_get_optional(dev, "sram");
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if (IS_ERR(drv->sram_reg)) {
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ret = PTR_ERR(drv->sram_reg);
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if (ret == -EPROBE_DEFER)
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goto out_free_resources;
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drv->sram_reg = NULL;
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} else {
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ret = regulator_enable(drv->sram_reg);
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if (ret) {
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dev_err(dev, "failed to enable sram regulator\n");
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goto out_free_resources;
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}
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}
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/*
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* We assume min voltage is 0 and tracking target voltage using
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* min_volt_shift for each iteration.
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* The retry_max is 3 times of expected iteration count.
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*/
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drv->vtrack_max = 3 * DIV_ROUND_UP(max(drv->soc_data->sram_max_volt,
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drv->soc_data->proc_max_volt),
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drv->soc_data->min_volt_shift);
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ret = clk_prepare_enable(drv->cci_clk);
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if (ret)
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goto out_free_resources;
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ret = dev_pm_opp_of_add_table(dev);
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if (ret) {
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dev_err(dev, "failed to add opp table: %d\n", ret);
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goto out_disable_cci_clk;
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}
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rate = clk_get_rate(drv->inter_clk);
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opp = dev_pm_opp_find_freq_ceil(dev, &rate);
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if (IS_ERR(opp)) {
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ret = PTR_ERR(opp);
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dev_err(dev, "failed to get intermediate opp: %d\n", ret);
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goto out_remove_opp_table;
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}
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drv->inter_voltage = dev_pm_opp_get_voltage(opp);
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dev_pm_opp_put(opp);
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rate = U32_MAX;
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opp = dev_pm_opp_find_freq_floor(drv->dev, &rate);
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if (IS_ERR(opp)) {
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dev_err(dev, "failed to get opp\n");
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ret = PTR_ERR(opp);
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goto out_remove_opp_table;
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}
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opp_volt = dev_pm_opp_get_voltage(opp);
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dev_pm_opp_put(opp);
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ret = mtk_ccifreq_set_voltage(drv, opp_volt);
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if (ret) {
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dev_err(dev, "failed to scale to highest voltage %lu in proc_reg\n",
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opp_volt);
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goto out_remove_opp_table;
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}
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passive_data = devm_kzalloc(dev, sizeof(*passive_data), GFP_KERNEL);
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if (!passive_data) {
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ret = -ENOMEM;
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goto out_remove_opp_table;
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}
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passive_data->parent_type = CPUFREQ_PARENT_DEV;
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drv->devfreq = devm_devfreq_add_device(dev, &mtk_ccifreq_profile,
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DEVFREQ_GOV_PASSIVE,
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passive_data);
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if (IS_ERR(drv->devfreq)) {
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ret = -EPROBE_DEFER;
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dev_err(dev, "failed to add devfreq device: %ld\n",
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PTR_ERR(drv->devfreq));
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goto out_remove_opp_table;
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}
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drv->opp_nb.notifier_call = mtk_ccifreq_opp_notifier;
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ret = dev_pm_opp_register_notifier(dev, &drv->opp_nb);
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if (ret) {
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dev_err(dev, "failed to register opp notifier: %d\n", ret);
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goto out_remove_opp_table;
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}
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return 0;
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out_remove_opp_table:
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dev_pm_opp_of_remove_table(dev);
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out_disable_cci_clk:
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clk_disable_unprepare(drv->cci_clk);
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out_free_resources:
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if (regulator_is_enabled(drv->proc_reg))
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regulator_disable(drv->proc_reg);
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if (drv->sram_reg && regulator_is_enabled(drv->sram_reg))
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regulator_disable(drv->sram_reg);
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return ret;
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}
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static int mtk_ccifreq_remove(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct mtk_ccifreq_drv *drv;
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drv = platform_get_drvdata(pdev);
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dev_pm_opp_unregister_notifier(dev, &drv->opp_nb);
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dev_pm_opp_of_remove_table(dev);
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clk_disable_unprepare(drv->cci_clk);
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regulator_disable(drv->proc_reg);
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if (drv->sram_reg)
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regulator_disable(drv->sram_reg);
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return 0;
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}
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static const struct mtk_ccifreq_platform_data mt8183_platform_data = {
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.min_volt_shift = 100000,
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.max_volt_shift = 200000,
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.proc_max_volt = 1150000,
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};
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static const struct mtk_ccifreq_platform_data mt8186_platform_data = {
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.min_volt_shift = 100000,
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.max_volt_shift = 250000,
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.proc_max_volt = 1118750,
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.sram_min_volt = 850000,
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.sram_max_volt = 1118750,
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};
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static const struct of_device_id mtk_ccifreq_machines[] = {
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{ .compatible = "mediatek,mt8183-cci", .data = &mt8183_platform_data },
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{ .compatible = "mediatek,mt8186-cci", .data = &mt8186_platform_data },
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{ },
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};
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MODULE_DEVICE_TABLE(of, mtk_ccifreq_machines);
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static struct platform_driver mtk_ccifreq_platdrv = {
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.probe = mtk_ccifreq_probe,
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.remove = mtk_ccifreq_remove,
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.driver = {
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.name = "mtk-ccifreq",
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.of_match_table = mtk_ccifreq_machines,
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},
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};
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module_platform_driver(mtk_ccifreq_platdrv);
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MODULE_DESCRIPTION("MediaTek CCI devfreq driver");
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MODULE_AUTHOR("Jia-Wei Chang <jia-wei.chang@mediatek.com>");
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MODULE_LICENSE("GPL v2");
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