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![Jia He](/assets/img/avatar_default.png)
Commitdc4e8c07e9
("ACPI: APEI: explicit init of HEST and GHES in apci_init()") introduced a bug leading to ghes_edac_register() to be invoked before edac_init(). Because at that time the bus "edac" hadn't been even registered, this created sysfs nodes as /devices/mc0 instead of /sys/devices/system/edac/mc/mc0 on an Ampere eMag server. Fix this by turning ghes_edac into a proper module. The list of GHES devices returned is not protected from being modified concurrently but it is pretty static as it gets created only during GHES init and latter is not a module so... [ bp: Massage. ] Fixes:dc4e8c07e9
("ACPI: APEI: explicit init of HEST and GHES in apci_init()") Co-developed-by: Borislav Petkov <bp@alien8.de> Signed-off-by: Borislav Petkov <bp@alien8.de> Signed-off-by: Jia He <justin.he@arm.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20221010023559.69655-5-justin.he@arm.com
573 lines
13 KiB
C
573 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* GHES/EDAC Linux driver
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*
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* Copyright (c) 2013 by Mauro Carvalho Chehab
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*
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* Red Hat Inc. https://www.redhat.com
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <acpi/ghes.h>
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#include <linux/edac.h>
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#include <linux/dmi.h>
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#include "edac_module.h"
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#include <ras/ras_event.h>
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#include <linux/notifier.h>
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#define OTHER_DETAIL_LEN 400
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struct ghes_pvt {
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struct mem_ctl_info *mci;
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/* Buffers for the error handling routine */
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char other_detail[OTHER_DETAIL_LEN];
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char msg[80];
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};
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static refcount_t ghes_refcount = REFCOUNT_INIT(0);
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/*
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* Access to ghes_pvt must be protected by ghes_lock. The spinlock
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* also provides the necessary (implicit) memory barrier for the SMP
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* case to make the pointer visible on another CPU.
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*/
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static struct ghes_pvt *ghes_pvt;
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/*
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* This driver's representation of the system hardware, as collected
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* from DMI.
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*/
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static struct ghes_hw_desc {
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int num_dimms;
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struct dimm_info *dimms;
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} ghes_hw;
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/* GHES registration mutex */
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static DEFINE_MUTEX(ghes_reg_mutex);
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/*
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* Sync with other, potentially concurrent callers of
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* ghes_edac_report_mem_error(). We don't know what the
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* "inventive" firmware would do.
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*/
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static DEFINE_SPINLOCK(ghes_lock);
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static bool system_scanned;
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static struct list_head *ghes_devs;
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/* Memory Device - Type 17 of SMBIOS spec */
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struct memdev_dmi_entry {
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u8 type;
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u8 length;
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u16 handle;
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u16 phys_mem_array_handle;
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u16 mem_err_info_handle;
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u16 total_width;
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u16 data_width;
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u16 size;
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u8 form_factor;
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u8 device_set;
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u8 device_locator;
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u8 bank_locator;
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u8 memory_type;
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u16 type_detail;
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u16 speed;
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u8 manufacturer;
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u8 serial_number;
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u8 asset_tag;
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u8 part_number;
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u8 attributes;
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u32 extended_size;
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u16 conf_mem_clk_speed;
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} __attribute__((__packed__));
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static struct dimm_info *find_dimm_by_handle(struct mem_ctl_info *mci, u16 handle)
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{
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struct dimm_info *dimm;
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mci_for_each_dimm(mci, dimm) {
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if (dimm->smbios_handle == handle)
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return dimm;
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}
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return NULL;
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}
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static void dimm_setup_label(struct dimm_info *dimm, u16 handle)
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{
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const char *bank = NULL, *device = NULL;
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dmi_memdev_name(handle, &bank, &device);
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/*
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* Set to a NULL string when both bank and device are zero. In this case,
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* the label assigned by default will be preserved.
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*/
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snprintf(dimm->label, sizeof(dimm->label), "%s%s%s",
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(bank && *bank) ? bank : "",
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(bank && *bank && device && *device) ? " " : "",
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(device && *device) ? device : "");
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}
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static void assign_dmi_dimm_info(struct dimm_info *dimm, struct memdev_dmi_entry *entry)
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{
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u16 rdr_mask = BIT(7) | BIT(13);
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if (entry->size == 0xffff) {
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pr_info("Can't get DIMM%i size\n", dimm->idx);
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dimm->nr_pages = MiB_TO_PAGES(32);/* Unknown */
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} else if (entry->size == 0x7fff) {
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dimm->nr_pages = MiB_TO_PAGES(entry->extended_size);
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} else {
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if (entry->size & BIT(15))
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dimm->nr_pages = MiB_TO_PAGES((entry->size & 0x7fff) << 10);
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else
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dimm->nr_pages = MiB_TO_PAGES(entry->size);
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}
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switch (entry->memory_type) {
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case 0x12:
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if (entry->type_detail & BIT(13))
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dimm->mtype = MEM_RDDR;
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else
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dimm->mtype = MEM_DDR;
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break;
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case 0x13:
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if (entry->type_detail & BIT(13))
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dimm->mtype = MEM_RDDR2;
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else
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dimm->mtype = MEM_DDR2;
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break;
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case 0x14:
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dimm->mtype = MEM_FB_DDR2;
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break;
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case 0x18:
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if (entry->type_detail & BIT(12))
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dimm->mtype = MEM_NVDIMM;
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else if (entry->type_detail & BIT(13))
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dimm->mtype = MEM_RDDR3;
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else
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dimm->mtype = MEM_DDR3;
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break;
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case 0x1a:
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if (entry->type_detail & BIT(12))
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dimm->mtype = MEM_NVDIMM;
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else if (entry->type_detail & BIT(13))
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dimm->mtype = MEM_RDDR4;
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else
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dimm->mtype = MEM_DDR4;
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break;
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default:
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if (entry->type_detail & BIT(6))
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dimm->mtype = MEM_RMBS;
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else if ((entry->type_detail & rdr_mask) == rdr_mask)
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dimm->mtype = MEM_RDR;
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else if (entry->type_detail & BIT(7))
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dimm->mtype = MEM_SDR;
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else if (entry->type_detail & BIT(9))
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dimm->mtype = MEM_EDO;
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else
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dimm->mtype = MEM_UNKNOWN;
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}
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/*
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* Actually, we can only detect if the memory has bits for
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* checksum or not
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*/
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if (entry->total_width == entry->data_width)
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dimm->edac_mode = EDAC_NONE;
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else
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dimm->edac_mode = EDAC_SECDED;
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dimm->dtype = DEV_UNKNOWN;
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dimm->grain = 128; /* Likely, worse case */
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dimm_setup_label(dimm, entry->handle);
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if (dimm->nr_pages) {
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edac_dbg(1, "DIMM%i: %s size = %d MB%s\n",
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dimm->idx, edac_mem_types[dimm->mtype],
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PAGES_TO_MiB(dimm->nr_pages),
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(dimm->edac_mode != EDAC_NONE) ? "(ECC)" : "");
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edac_dbg(2, "\ttype %d, detail 0x%02x, width %d(total %d)\n",
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entry->memory_type, entry->type_detail,
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entry->total_width, entry->data_width);
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}
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dimm->smbios_handle = entry->handle;
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}
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static void enumerate_dimms(const struct dmi_header *dh, void *arg)
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{
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struct memdev_dmi_entry *entry = (struct memdev_dmi_entry *)dh;
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struct ghes_hw_desc *hw = (struct ghes_hw_desc *)arg;
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struct dimm_info *d;
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if (dh->type != DMI_ENTRY_MEM_DEVICE)
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return;
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/* Enlarge the array with additional 16 */
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if (!hw->num_dimms || !(hw->num_dimms % 16)) {
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struct dimm_info *new;
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new = krealloc_array(hw->dimms, hw->num_dimms + 16,
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sizeof(struct dimm_info), GFP_KERNEL);
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if (!new) {
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WARN_ON_ONCE(1);
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return;
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}
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hw->dimms = new;
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}
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d = &hw->dimms[hw->num_dimms];
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d->idx = hw->num_dimms;
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assign_dmi_dimm_info(d, entry);
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hw->num_dimms++;
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}
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static void ghes_scan_system(void)
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{
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if (system_scanned)
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return;
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dmi_walk(enumerate_dimms, &ghes_hw);
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system_scanned = true;
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}
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static int print_mem_error_other_detail(const struct cper_sec_mem_err *mem, char *msg,
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const char *location, unsigned int len)
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{
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u32 n;
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if (!msg)
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return 0;
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n = 0;
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len -= 1;
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n += scnprintf(msg + n, len - n, "APEI location: %s ", location);
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if (!(mem->validation_bits & CPER_MEM_VALID_ERROR_STATUS))
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goto out;
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n += scnprintf(msg + n, len - n, "status(0x%016llx): ", mem->error_status);
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n += scnprintf(msg + n, len - n, "%s ", cper_mem_err_status_str(mem->error_status));
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out:
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msg[n] = '\0';
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return n;
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}
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static int ghes_edac_report_mem_error(struct notifier_block *nb,
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unsigned long val, void *data)
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{
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struct cper_sec_mem_err *mem_err = (struct cper_sec_mem_err *)data;
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struct cper_mem_err_compact cmem;
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struct edac_raw_error_desc *e;
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struct mem_ctl_info *mci;
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unsigned long sev = val;
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struct ghes_pvt *pvt;
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unsigned long flags;
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char *p;
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/*
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* We can do the locking below because GHES defers error processing
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* from NMI to IRQ context. Whenever that changes, we'd at least
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* know.
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*/
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if (WARN_ON_ONCE(in_nmi()))
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return NOTIFY_OK;
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spin_lock_irqsave(&ghes_lock, flags);
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pvt = ghes_pvt;
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if (!pvt)
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goto unlock;
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mci = pvt->mci;
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e = &mci->error_desc;
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/* Cleans the error report buffer */
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memset(e, 0, sizeof (*e));
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e->error_count = 1;
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e->grain = 1;
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e->msg = pvt->msg;
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e->other_detail = pvt->other_detail;
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e->top_layer = -1;
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e->mid_layer = -1;
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e->low_layer = -1;
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*pvt->other_detail = '\0';
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*pvt->msg = '\0';
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switch (sev) {
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case GHES_SEV_CORRECTED:
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e->type = HW_EVENT_ERR_CORRECTED;
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break;
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case GHES_SEV_RECOVERABLE:
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e->type = HW_EVENT_ERR_UNCORRECTED;
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break;
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case GHES_SEV_PANIC:
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e->type = HW_EVENT_ERR_FATAL;
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break;
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default:
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case GHES_SEV_NO:
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e->type = HW_EVENT_ERR_INFO;
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}
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edac_dbg(1, "error validation_bits: 0x%08llx\n",
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(long long)mem_err->validation_bits);
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/* Error type, mapped on e->msg */
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if (mem_err->validation_bits & CPER_MEM_VALID_ERROR_TYPE) {
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u8 etype = mem_err->error_type;
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p = pvt->msg;
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p += snprintf(p, sizeof(pvt->msg), "%s", cper_mem_err_type_str(etype));
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} else {
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strcpy(pvt->msg, "unknown error");
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}
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/* Error address */
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if (mem_err->validation_bits & CPER_MEM_VALID_PA) {
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e->page_frame_number = PHYS_PFN(mem_err->physical_addr);
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e->offset_in_page = offset_in_page(mem_err->physical_addr);
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}
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/* Error grain */
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if (mem_err->validation_bits & CPER_MEM_VALID_PA_MASK)
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e->grain = ~mem_err->physical_addr_mask + 1;
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/* Memory error location, mapped on e->location */
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p = e->location;
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cper_mem_err_pack(mem_err, &cmem);
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p += cper_mem_err_location(&cmem, p);
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if (mem_err->validation_bits & CPER_MEM_VALID_MODULE_HANDLE) {
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struct dimm_info *dimm;
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p += cper_dimm_err_location(&cmem, p);
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dimm = find_dimm_by_handle(mci, mem_err->mem_dev_handle);
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if (dimm) {
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e->top_layer = dimm->idx;
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strcpy(e->label, dimm->label);
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}
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}
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if (p > e->location)
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*(p - 1) = '\0';
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if (!*e->label)
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strcpy(e->label, "unknown memory");
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/* All other fields are mapped on e->other_detail */
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p = pvt->other_detail;
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p += print_mem_error_other_detail(mem_err, p, e->location, OTHER_DETAIL_LEN);
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if (p > pvt->other_detail)
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*(p - 1) = '\0';
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edac_raw_mc_handle_error(e);
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unlock:
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spin_unlock_irqrestore(&ghes_lock, flags);
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return NOTIFY_OK;
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}
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static struct notifier_block ghes_edac_mem_err_nb = {
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.notifier_call = ghes_edac_report_mem_error,
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.priority = 0,
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};
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static int ghes_edac_register(struct device *dev)
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{
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bool fake = false;
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struct mem_ctl_info *mci;
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struct ghes_pvt *pvt;
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struct edac_mc_layer layers[1];
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unsigned long flags;
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int rc = 0;
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/* finish another registration/unregistration instance first */
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mutex_lock(&ghes_reg_mutex);
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/*
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* We have only one logical memory controller to which all DIMMs belong.
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*/
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if (refcount_inc_not_zero(&ghes_refcount))
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goto unlock;
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ghes_scan_system();
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/* Check if we've got a bogus BIOS */
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if (!ghes_hw.num_dimms) {
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fake = true;
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ghes_hw.num_dimms = 1;
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}
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layers[0].type = EDAC_MC_LAYER_ALL_MEM;
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layers[0].size = ghes_hw.num_dimms;
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layers[0].is_virt_csrow = true;
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mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(struct ghes_pvt));
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if (!mci) {
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pr_info("Can't allocate memory for EDAC data\n");
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rc = -ENOMEM;
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goto unlock;
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}
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pvt = mci->pvt_info;
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pvt->mci = mci;
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mci->pdev = dev;
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mci->mtype_cap = MEM_FLAG_EMPTY;
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mci->edac_ctl_cap = EDAC_FLAG_NONE;
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mci->edac_cap = EDAC_FLAG_NONE;
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mci->mod_name = "ghes_edac.c";
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mci->ctl_name = "ghes_edac";
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mci->dev_name = "ghes";
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if (fake) {
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pr_info("This system has a very crappy BIOS: It doesn't even list the DIMMS.\n");
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pr_info("Its SMBIOS info is wrong. It is doubtful that the error report would\n");
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pr_info("work on such system. Use this driver with caution\n");
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}
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pr_info("This system has %d DIMM sockets.\n", ghes_hw.num_dimms);
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if (!fake) {
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struct dimm_info *src, *dst;
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int i = 0;
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mci_for_each_dimm(mci, dst) {
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src = &ghes_hw.dimms[i];
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dst->idx = src->idx;
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dst->smbios_handle = src->smbios_handle;
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dst->nr_pages = src->nr_pages;
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dst->mtype = src->mtype;
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dst->edac_mode = src->edac_mode;
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dst->dtype = src->dtype;
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dst->grain = src->grain;
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/*
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* If no src->label, preserve default label assigned
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* from EDAC core.
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*/
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if (strlen(src->label))
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memcpy(dst->label, src->label, sizeof(src->label));
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i++;
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}
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} else {
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struct dimm_info *dimm = edac_get_dimm(mci, 0, 0, 0);
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dimm->nr_pages = 1;
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dimm->grain = 128;
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dimm->mtype = MEM_UNKNOWN;
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dimm->dtype = DEV_UNKNOWN;
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dimm->edac_mode = EDAC_SECDED;
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}
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rc = edac_mc_add_mc(mci);
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if (rc < 0) {
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pr_info("Can't register with the EDAC core\n");
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edac_mc_free(mci);
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rc = -ENODEV;
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goto unlock;
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}
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spin_lock_irqsave(&ghes_lock, flags);
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ghes_pvt = pvt;
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spin_unlock_irqrestore(&ghes_lock, flags);
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ghes_register_report_chain(&ghes_edac_mem_err_nb);
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/* only set on success */
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refcount_set(&ghes_refcount, 1);
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unlock:
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|
|
|
/* Not needed anymore */
|
|
kfree(ghes_hw.dimms);
|
|
ghes_hw.dimms = NULL;
|
|
|
|
mutex_unlock(&ghes_reg_mutex);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static void ghes_edac_unregister(struct ghes *ghes)
|
|
{
|
|
struct mem_ctl_info *mci;
|
|
unsigned long flags;
|
|
|
|
mutex_lock(&ghes_reg_mutex);
|
|
|
|
system_scanned = false;
|
|
memset(&ghes_hw, 0, sizeof(struct ghes_hw_desc));
|
|
|
|
if (!refcount_dec_and_test(&ghes_refcount))
|
|
goto unlock;
|
|
|
|
/*
|
|
* Wait for the irq handler being finished.
|
|
*/
|
|
spin_lock_irqsave(&ghes_lock, flags);
|
|
mci = ghes_pvt ? ghes_pvt->mci : NULL;
|
|
ghes_pvt = NULL;
|
|
spin_unlock_irqrestore(&ghes_lock, flags);
|
|
|
|
if (!mci)
|
|
goto unlock;
|
|
|
|
mci = edac_mc_del_mc(mci->pdev);
|
|
if (mci)
|
|
edac_mc_free(mci);
|
|
|
|
ghes_unregister_report_chain(&ghes_edac_mem_err_nb);
|
|
|
|
unlock:
|
|
mutex_unlock(&ghes_reg_mutex);
|
|
}
|
|
|
|
static int __init ghes_edac_init(void)
|
|
{
|
|
struct ghes *g, *g_tmp;
|
|
|
|
ghes_devs = ghes_get_devices();
|
|
if (!ghes_devs)
|
|
return -ENODEV;
|
|
|
|
if (list_empty(ghes_devs)) {
|
|
pr_info("GHES probing device list is empty");
|
|
return -ENODEV;
|
|
}
|
|
|
|
list_for_each_entry_safe(g, g_tmp, ghes_devs, elist) {
|
|
ghes_edac_register(g->dev);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
module_init(ghes_edac_init);
|
|
|
|
static void __exit ghes_edac_exit(void)
|
|
{
|
|
struct ghes *g, *g_tmp;
|
|
|
|
list_for_each_entry_safe(g, g_tmp, ghes_devs, elist) {
|
|
ghes_edac_unregister(g);
|
|
}
|
|
}
|
|
module_exit(ghes_edac_exit);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_DESCRIPTION("Output ACPI APEI/GHES BIOS detected errors via EDAC");
|