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![Xiantao Hu](/assets/img/avatar_default.png)
Sunplus SP7021 requires watchdog timer support. Add watchdog driver to enable this. Signed-off-by: Xiantao Hu <xt.hu@cqplus1.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20220324031805.61316-3-xt.hu@cqplus1.com Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
220 lines
5.3 KiB
C
220 lines
5.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* sunplus Watchdog Driver
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*
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* Copyright (C) 2021 Sunplus Technology Co., Ltd.
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*
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/platform_device.h>
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#include <linux/reset.h>
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#include <linux/watchdog.h>
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#define WDT_CTRL 0x00
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#define WDT_CNT 0x04
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#define WDT_STOP 0x3877
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#define WDT_RESUME 0x4A4B
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#define WDT_CLRIRQ 0x7482
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#define WDT_UNLOCK 0xAB00
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#define WDT_LOCK 0xAB01
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#define WDT_CONMAX 0xDEAF
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/* TIMEOUT_MAX = ffff0/90kHz =11.65, so longer than 11 seconds will time out. */
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#define SP_WDT_MAX_TIMEOUT 11U
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#define SP_WDT_DEFAULT_TIMEOUT 10
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#define STC_CLK 90000
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#define DEVICE_NAME "sunplus-wdt"
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static unsigned int timeout;
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module_param(timeout, int, 0);
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MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds");
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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struct sp_wdt_priv {
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struct watchdog_device wdev;
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void __iomem *base;
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struct clk *clk;
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struct reset_control *rstc;
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};
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static int sp_wdt_restart(struct watchdog_device *wdev,
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unsigned long action, void *data)
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{
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struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev);
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void __iomem *base = priv->base;
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writel(WDT_STOP, base + WDT_CTRL);
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writel(WDT_UNLOCK, base + WDT_CTRL);
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writel(0x0001, base + WDT_CNT);
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writel(WDT_LOCK, base + WDT_CTRL);
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writel(WDT_RESUME, base + WDT_CTRL);
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return 0;
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}
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static int sp_wdt_ping(struct watchdog_device *wdev)
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{
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struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev);
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void __iomem *base = priv->base;
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u32 count;
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if (wdev->timeout > SP_WDT_MAX_TIMEOUT) {
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/* WDT_CONMAX sets the count to the maximum (down-counting). */
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writel(WDT_CONMAX, base + WDT_CTRL);
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} else {
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writel(WDT_UNLOCK, base + WDT_CTRL);
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/*
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* Watchdog timer is a 20-bit down-counting based on STC_CLK.
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* This register bits[16:0] is from bit[19:4] of the watchdog
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* timer counter.
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*/
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count = (wdev->timeout * STC_CLK) >> 4;
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writel(count, base + WDT_CNT);
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writel(WDT_LOCK, base + WDT_CTRL);
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}
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return 0;
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}
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static int sp_wdt_stop(struct watchdog_device *wdev)
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{
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struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev);
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void __iomem *base = priv->base;
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writel(WDT_STOP, base + WDT_CTRL);
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return 0;
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}
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static int sp_wdt_start(struct watchdog_device *wdev)
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{
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struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev);
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void __iomem *base = priv->base;
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writel(WDT_RESUME, base + WDT_CTRL);
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return 0;
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}
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static unsigned int sp_wdt_get_timeleft(struct watchdog_device *wdev)
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{
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struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev);
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void __iomem *base = priv->base;
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u32 val;
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val = readl(base + WDT_CNT);
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val &= 0xffff;
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val = val << 4;
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return val;
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}
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static const struct watchdog_info sp_wdt_info = {
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.identity = DEVICE_NAME,
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.options = WDIOF_SETTIMEOUT |
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WDIOF_MAGICCLOSE |
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WDIOF_KEEPALIVEPING,
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};
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static const struct watchdog_ops sp_wdt_ops = {
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.owner = THIS_MODULE,
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.start = sp_wdt_start,
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.stop = sp_wdt_stop,
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.ping = sp_wdt_ping,
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.get_timeleft = sp_wdt_get_timeleft,
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.restart = sp_wdt_restart,
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};
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static void sp_clk_disable_unprepare(void *data)
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{
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clk_disable_unprepare(data);
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}
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static void sp_reset_control_assert(void *data)
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{
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reset_control_assert(data);
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}
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static int sp_wdt_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct sp_wdt_priv *priv;
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int ret;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(priv->clk))
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return dev_err_probe(dev, PTR_ERR(priv->clk), "Failed to get clock\n");
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ret = clk_prepare_enable(priv->clk);
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if (ret)
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return dev_err_probe(dev, ret, "Failed to enable clock\n");
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ret = devm_add_action_or_reset(dev, sp_clk_disable_unprepare, priv->clk);
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if (ret)
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return ret;
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/* The timer and watchdog shared the STC reset */
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priv->rstc = devm_reset_control_get_shared(dev, NULL);
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if (IS_ERR(priv->rstc))
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return dev_err_probe(dev, PTR_ERR(priv->rstc), "Failed to get reset\n");
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reset_control_deassert(priv->rstc);
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ret = devm_add_action_or_reset(dev, sp_reset_control_assert, priv->rstc);
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if (ret)
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return ret;
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priv->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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priv->wdev.info = &sp_wdt_info;
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priv->wdev.ops = &sp_wdt_ops;
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priv->wdev.timeout = SP_WDT_DEFAULT_TIMEOUT;
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priv->wdev.max_hw_heartbeat_ms = SP_WDT_MAX_TIMEOUT * 1000;
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priv->wdev.min_timeout = 1;
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priv->wdev.parent = dev;
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watchdog_set_drvdata(&priv->wdev, priv);
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watchdog_init_timeout(&priv->wdev, timeout, dev);
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watchdog_set_nowayout(&priv->wdev, nowayout);
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watchdog_stop_on_reboot(&priv->wdev);
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watchdog_set_restart_priority(&priv->wdev, 128);
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return devm_watchdog_register_device(dev, &priv->wdev);
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}
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static const struct of_device_id sp_wdt_of_match[] = {
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{.compatible = "sunplus,sp7021-wdt", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, sp_wdt_of_match);
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static struct platform_driver sp_wdt_driver = {
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.probe = sp_wdt_probe,
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.driver = {
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.name = DEVICE_NAME,
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.of_match_table = sp_wdt_of_match,
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},
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};
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module_platform_driver(sp_wdt_driver);
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MODULE_AUTHOR("Xiantao Hu <xt.hu@cqplus1.com>");
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MODULE_DESCRIPTION("Sunplus Watchdog Timer Driver");
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MODULE_LICENSE("GPL");
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