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![Greg Kroah-Hartman](/assets/img/avatar_default.png)
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
380 lines
11 KiB
ArmAsm
380 lines
11 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This file contains the code that gets mapped at the upper end of each task's text
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* region. For now, it contains the signal trampoline code only.
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*
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* Copyright (C) 1999-2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*/
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#include <asm/asmmacro.h>
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#include <asm/errno.h>
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#include <asm/asm-offsets.h>
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#include <asm/sigcontext.h>
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#include <asm/unistd.h>
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#include <asm/kregs.h>
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#include <asm/page.h>
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#include <asm/native/inst.h>
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/*
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* We can't easily refer to symbols inside the kernel. To avoid full runtime relocation,
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* complications with the linker (which likes to create PLT stubs for branches
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* to targets outside the shared object) and to avoid multi-phase kernel builds, we
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* simply create minimalistic "patch lists" in special ELF sections.
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*/
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.section ".data..patch.fsyscall_table", "a"
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.previous
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#define LOAD_FSYSCALL_TABLE(reg) \
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[1:] movl reg=0; \
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.xdata4 ".data..patch.fsyscall_table", 1b-.
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.section ".data..patch.brl_fsys_bubble_down", "a"
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.previous
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#define BRL_COND_FSYS_BUBBLE_DOWN(pr) \
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[1:](pr)brl.cond.sptk 0; \
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;; \
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.xdata4 ".data..patch.brl_fsys_bubble_down", 1b-.
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GLOBAL_ENTRY(__kernel_syscall_via_break)
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.prologue
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.altrp b6
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.body
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/*
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* Note: for (fast) syscall restart to work, the break instruction must be
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* the first one in the bundle addressed by syscall_via_break.
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*/
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{ .mib
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break 0x100000
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nop.i 0
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br.ret.sptk.many b6
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}
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END(__kernel_syscall_via_break)
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# define ARG0_OFF (16 + IA64_SIGFRAME_ARG0_OFFSET)
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# define ARG1_OFF (16 + IA64_SIGFRAME_ARG1_OFFSET)
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# define ARG2_OFF (16 + IA64_SIGFRAME_ARG2_OFFSET)
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# define SIGHANDLER_OFF (16 + IA64_SIGFRAME_HANDLER_OFFSET)
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# define SIGCONTEXT_OFF (16 + IA64_SIGFRAME_SIGCONTEXT_OFFSET)
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# define FLAGS_OFF IA64_SIGCONTEXT_FLAGS_OFFSET
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# define CFM_OFF IA64_SIGCONTEXT_CFM_OFFSET
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# define FR6_OFF IA64_SIGCONTEXT_FR6_OFFSET
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# define BSP_OFF IA64_SIGCONTEXT_AR_BSP_OFFSET
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# define RNAT_OFF IA64_SIGCONTEXT_AR_RNAT_OFFSET
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# define UNAT_OFF IA64_SIGCONTEXT_AR_UNAT_OFFSET
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# define FPSR_OFF IA64_SIGCONTEXT_AR_FPSR_OFFSET
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# define PR_OFF IA64_SIGCONTEXT_PR_OFFSET
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# define RP_OFF IA64_SIGCONTEXT_IP_OFFSET
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# define SP_OFF IA64_SIGCONTEXT_R12_OFFSET
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# define RBS_BASE_OFF IA64_SIGCONTEXT_RBS_BASE_OFFSET
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# define LOADRS_OFF IA64_SIGCONTEXT_LOADRS_OFFSET
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# define base0 r2
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# define base1 r3
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/*
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* When we get here, the memory stack looks like this:
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*
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* +===============================+
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* | |
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* // struct sigframe //
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* | |
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* +-------------------------------+ <-- sp+16
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* | 16 byte of scratch |
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* | space |
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* +-------------------------------+ <-- sp
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*
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* The register stack looks _exactly_ the way it looked at the time the signal
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* occurred. In other words, we're treading on a potential mine-field: each
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* incoming general register may be a NaT value (including sp, in which case the
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* process ends up dying with a SIGSEGV).
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*
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* The first thing need to do is a cover to get the registers onto the backing
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* store. Once that is done, we invoke the signal handler which may modify some
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* of the machine state. After returning from the signal handler, we return
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* control to the previous context by executing a sigreturn system call. A signal
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* handler may call the rt_sigreturn() function to directly return to a given
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* sigcontext. However, the user-level sigreturn() needs to do much more than
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* calling the rt_sigreturn() system call as it needs to unwind the stack to
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* restore preserved registers that may have been saved on the signal handler's
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* call stack.
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*/
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#define SIGTRAMP_SAVES \
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.unwabi 3, 's'; /* mark this as a sigtramp handler (saves scratch regs) */ \
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.unwabi @svr4, 's'; /* backwards compatibility with old unwinders (remove in v2.7) */ \
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.savesp ar.unat, UNAT_OFF+SIGCONTEXT_OFF; \
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.savesp ar.fpsr, FPSR_OFF+SIGCONTEXT_OFF; \
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.savesp pr, PR_OFF+SIGCONTEXT_OFF; \
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.savesp rp, RP_OFF+SIGCONTEXT_OFF; \
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.savesp ar.pfs, CFM_OFF+SIGCONTEXT_OFF; \
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.vframesp SP_OFF+SIGCONTEXT_OFF
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GLOBAL_ENTRY(__kernel_sigtramp)
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// describe the state that is active when we get here:
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.prologue
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SIGTRAMP_SAVES
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.body
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.label_state 1
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adds base0=SIGHANDLER_OFF,sp
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adds base1=RBS_BASE_OFF+SIGCONTEXT_OFF,sp
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br.call.sptk.many rp=1f
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1:
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ld8 r17=[base0],(ARG0_OFF-SIGHANDLER_OFF) // get pointer to signal handler's plabel
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ld8 r15=[base1] // get address of new RBS base (or NULL)
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cover // push args in interrupted frame onto backing store
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;;
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cmp.ne p1,p0=r15,r0 // do we need to switch rbs? (note: pr is saved by kernel)
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mov.m r9=ar.bsp // fetch ar.bsp
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.spillsp.p p1, ar.rnat, RNAT_OFF+SIGCONTEXT_OFF
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(p1) br.cond.spnt setup_rbs // yup -> (clobbers p8, r14-r16, and r18-r20)
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back_from_setup_rbs:
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alloc r8=ar.pfs,0,0,3,0
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ld8 out0=[base0],16 // load arg0 (signum)
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adds base1=(ARG1_OFF-(RBS_BASE_OFF+SIGCONTEXT_OFF)),base1
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;;
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ld8 out1=[base1] // load arg1 (siginfop)
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ld8 r10=[r17],8 // get signal handler entry point
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;;
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ld8 out2=[base0] // load arg2 (sigcontextp)
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ld8 gp=[r17] // get signal handler's global pointer
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adds base0=(BSP_OFF+SIGCONTEXT_OFF),sp
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;;
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.spillsp ar.bsp, BSP_OFF+SIGCONTEXT_OFF
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st8 [base0]=r9 // save sc_ar_bsp
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adds base0=(FR6_OFF+SIGCONTEXT_OFF),sp
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adds base1=(FR6_OFF+16+SIGCONTEXT_OFF),sp
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;;
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stf.spill [base0]=f6,32
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stf.spill [base1]=f7,32
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;;
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stf.spill [base0]=f8,32
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stf.spill [base1]=f9,32
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mov b6=r10
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;;
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stf.spill [base0]=f10,32
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stf.spill [base1]=f11,32
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;;
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stf.spill [base0]=f12,32
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stf.spill [base1]=f13,32
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;;
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stf.spill [base0]=f14,32
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stf.spill [base1]=f15,32
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br.call.sptk.many rp=b6 // call the signal handler
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.ret0: adds base0=(BSP_OFF+SIGCONTEXT_OFF),sp
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;;
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ld8 r15=[base0] // fetch sc_ar_bsp
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mov r14=ar.bsp
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;;
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cmp.ne p1,p0=r14,r15 // do we need to restore the rbs?
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(p1) br.cond.spnt restore_rbs // yup -> (clobbers r14-r18, f6 & f7)
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;;
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back_from_restore_rbs:
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adds base0=(FR6_OFF+SIGCONTEXT_OFF),sp
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adds base1=(FR6_OFF+16+SIGCONTEXT_OFF),sp
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;;
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ldf.fill f6=[base0],32
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ldf.fill f7=[base1],32
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;;
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ldf.fill f8=[base0],32
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ldf.fill f9=[base1],32
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;;
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ldf.fill f10=[base0],32
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ldf.fill f11=[base1],32
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;;
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ldf.fill f12=[base0],32
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ldf.fill f13=[base1],32
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;;
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ldf.fill f14=[base0],32
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ldf.fill f15=[base1],32
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mov r15=__NR_rt_sigreturn
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.restore sp // pop .prologue
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break __BREAK_SYSCALL
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.prologue
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SIGTRAMP_SAVES
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setup_rbs:
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mov ar.rsc=0 // put RSE into enforced lazy mode
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;;
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.save ar.rnat, r19
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mov r19=ar.rnat // save RNaT before switching backing store area
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adds r14=(RNAT_OFF+SIGCONTEXT_OFF),sp
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mov r18=ar.bspstore
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mov ar.bspstore=r15 // switch over to new register backing store area
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;;
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.spillsp ar.rnat, RNAT_OFF+SIGCONTEXT_OFF
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st8 [r14]=r19 // save sc_ar_rnat
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.body
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mov.m r16=ar.bsp // sc_loadrs <- (new bsp - new bspstore) << 16
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adds r14=(LOADRS_OFF+SIGCONTEXT_OFF),sp
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;;
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invala
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sub r15=r16,r15
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extr.u r20=r18,3,6
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;;
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mov ar.rsc=0xf // set RSE into eager mode, pl 3
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cmp.eq p8,p0=63,r20
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shl r15=r15,16
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;;
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st8 [r14]=r15 // save sc_loadrs
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(p8) st8 [r18]=r19 // if bspstore points at RNaT slot, store RNaT there now
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.restore sp // pop .prologue
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br.cond.sptk back_from_setup_rbs
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.prologue
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SIGTRAMP_SAVES
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.spillsp ar.rnat, RNAT_OFF+SIGCONTEXT_OFF
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.body
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restore_rbs:
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// On input:
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// r14 = bsp1 (bsp at the time of return from signal handler)
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// r15 = bsp0 (bsp at the time the signal occurred)
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//
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// Here, we need to calculate bspstore0, the value that ar.bspstore needs
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// to be set to, based on bsp0 and the size of the dirty partition on
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// the alternate stack (sc_loadrs >> 16). This can be done with the
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// following algorithm:
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//
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// bspstore0 = rse_skip_regs(bsp0, -rse_num_regs(bsp1 - (loadrs >> 19), bsp1));
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//
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// This is what the code below does.
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//
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alloc r2=ar.pfs,0,0,0,0 // alloc null frame
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adds r16=(LOADRS_OFF+SIGCONTEXT_OFF),sp
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adds r18=(RNAT_OFF+SIGCONTEXT_OFF),sp
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;;
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ld8 r17=[r16]
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ld8 r16=[r18] // get new rnat
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extr.u r18=r15,3,6 // r18 <- rse_slot_num(bsp0)
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;;
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mov ar.rsc=r17 // put RSE into enforced lazy mode
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shr.u r17=r17,16
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;;
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sub r14=r14,r17 // r14 (bspstore1) <- bsp1 - (sc_loadrs >> 16)
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shr.u r17=r17,3 // r17 <- (sc_loadrs >> 19)
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;;
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loadrs // restore dirty partition
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extr.u r14=r14,3,6 // r14 <- rse_slot_num(bspstore1)
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;;
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add r14=r14,r17 // r14 <- rse_slot_num(bspstore1) + (sc_loadrs >> 19)
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;;
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shr.u r14=r14,6 // r14 <- (rse_slot_num(bspstore1) + (sc_loadrs >> 19))/0x40
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;;
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sub r14=r14,r17 // r14 <- -rse_num_regs(bspstore1, bsp1)
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movl r17=0x8208208208208209
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;;
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add r18=r18,r14 // r18 (delta) <- rse_slot_num(bsp0) - rse_num_regs(bspstore1,bsp1)
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setf.sig f7=r17
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cmp.lt p7,p0=r14,r0 // p7 <- (r14 < 0)?
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;;
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(p7) adds r18=-62,r18 // delta -= 62
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;;
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setf.sig f6=r18
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;;
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xmpy.h f6=f6,f7
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;;
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getf.sig r17=f6
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;;
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add r17=r17,r18
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shr r18=r18,63
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;;
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shr r17=r17,5
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;;
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sub r17=r17,r18 // r17 = delta/63
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;;
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add r17=r14,r17 // r17 <- delta/63 - rse_num_regs(bspstore1, bsp1)
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;;
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shladd r15=r17,3,r15 // r15 <- bsp0 + 8*(delta/63 - rse_num_regs(bspstore1, bsp1))
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;;
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mov ar.bspstore=r15 // switch back to old register backing store area
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;;
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mov ar.rnat=r16 // restore RNaT
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mov ar.rsc=0xf // (will be restored later on from sc_ar_rsc)
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// invala not necessary as that will happen when returning to user-mode
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br.cond.sptk back_from_restore_rbs
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END(__kernel_sigtramp)
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/*
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* On entry:
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* r11 = saved ar.pfs
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* r15 = system call #
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* b0 = saved return address
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* b6 = return address
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* On exit:
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* r11 = saved ar.pfs
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* r15 = system call #
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* b0 = saved return address
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* all other "scratch" registers: undefined
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* all "preserved" registers: same as on entry
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*/
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GLOBAL_ENTRY(__kernel_syscall_via_epc)
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.prologue
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.altrp b6
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.body
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{
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/*
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* Note: the kernel cannot assume that the first two instructions in this
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* bundle get executed. The remaining code must be safe even if
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* they do not get executed.
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*/
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adds r17=-1024,r15 // A
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mov r10=0 // A default to successful syscall execution
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epc // B causes split-issue
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}
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;;
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RSM_PSR_BE_I(r20, r22) // M2 (5 cyc to srlz.d)
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LOAD_FSYSCALL_TABLE(r14) // X
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;;
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mov r16=IA64_KR(CURRENT) // M2 (12 cyc)
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shladd r18=r17,3,r14 // A
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mov r19=NR_syscalls-1 // A
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;;
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lfetch [r18] // M0|1
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MOV_FROM_PSR(p0, r29, r8) // M2 (12 cyc)
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// If r17 is a NaT, p6 will be zero
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cmp.geu p6,p7=r19,r17 // A (sysnr > 0 && sysnr < 1024+NR_syscalls)?
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;;
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mov r21=ar.fpsr // M2 (12 cyc)
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tnat.nz p10,p9=r15 // I0
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mov.i r26=ar.pfs // I0 (would stall anyhow due to srlz.d...)
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;;
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srlz.d // M0 (forces split-issue) ensure PSR.BE==0
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(p6) ld8 r18=[r18] // M0|1
|
|
nop.i 0
|
|
;;
|
|
nop.m 0
|
|
(p6) tbit.z.unc p8,p0=r18,0 // I0 (dual-issues with "mov b7=r18"!)
|
|
nop.i 0
|
|
;;
|
|
SSM_PSR_I(p8, p14, r25)
|
|
(p6) mov b7=r18 // I0
|
|
(p8) br.dptk.many b7 // B
|
|
|
|
mov r27=ar.rsc // M2 (12 cyc)
|
|
/*
|
|
* brl.cond doesn't work as intended because the linker would convert this branch
|
|
* into a branch to a PLT. Perhaps there will be a way to avoid this with some
|
|
* future version of the linker. In the meantime, we just use an indirect branch
|
|
* instead.
|
|
*/
|
|
#ifdef CONFIG_ITANIUM
|
|
(p6) add r14=-8,r14 // r14 <- addr of fsys_bubble_down entry
|
|
;;
|
|
(p6) ld8 r14=[r14] // r14 <- fsys_bubble_down
|
|
;;
|
|
(p6) mov b7=r14
|
|
(p6) br.sptk.many b7
|
|
#else
|
|
BRL_COND_FSYS_BUBBLE_DOWN(p6)
|
|
#endif
|
|
SSM_PSR_I(p0, p14, r10)
|
|
mov r10=-1
|
|
(p10) mov r8=EINVAL
|
|
(p9) mov r8=ENOSYS
|
|
FSYS_RETURN
|
|
|
|
END(__kernel_syscall_via_epc)
|