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![Christoph Hellwig](/assets/img/avatar_default.png)
With the SGI SN2 machvec removal most of the indirections are unused now, so remove them. This includes the entire removal of the mmio read*/write* macros as the generic ones are identical to the asm-generic/io.h version. Signed-off-by: Christoph Hellwig <hch@lst.de> Link: https://lkml.kernel.org/r/20190813072514.23299-17-hch@lst.de Signed-off-by: Tony Luck <tony.luck@intel.com>
198 lines
4.2 KiB
C
198 lines
4.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* MSI hooks for standard x86 apic
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*/
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#include <linux/pci.h>
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#include <linux/irq.h>
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#include <linux/msi.h>
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#include <linux/dmar.h>
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#include <asm/smp.h>
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#include <asm/msidef.h>
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static struct irq_chip ia64_msi_chip;
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#ifdef CONFIG_SMP
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static int ia64_set_msi_irq_affinity(struct irq_data *idata,
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const cpumask_t *cpu_mask, bool force)
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{
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struct msi_msg msg;
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u32 addr, data;
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int cpu = cpumask_first_and(cpu_mask, cpu_online_mask);
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unsigned int irq = idata->irq;
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if (irq_prepare_move(irq, cpu))
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return -1;
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__get_cached_msi_msg(irq_data_get_msi_desc(idata), &msg);
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addr = msg.address_lo;
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addr &= MSI_ADDR_DEST_ID_MASK;
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addr |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
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msg.address_lo = addr;
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data = msg.data;
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data &= MSI_DATA_VECTOR_MASK;
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data |= MSI_DATA_VECTOR(irq_to_vector(irq));
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msg.data = data;
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pci_write_msi_msg(irq, &msg);
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cpumask_copy(irq_data_get_affinity_mask(idata), cpumask_of(cpu));
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return 0;
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}
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#endif /* CONFIG_SMP */
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int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
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{
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struct msi_msg msg;
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unsigned long dest_phys_id;
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int irq, vector;
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irq = create_irq();
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if (irq < 0)
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return irq;
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irq_set_msi_desc(irq, desc);
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dest_phys_id = cpu_physical_id(cpumask_any_and(&(irq_to_domain(irq)),
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cpu_online_mask));
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vector = irq_to_vector(irq);
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msg.address_hi = 0;
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msg.address_lo =
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MSI_ADDR_HEADER |
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MSI_ADDR_DEST_MODE_PHYS |
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MSI_ADDR_REDIRECTION_CPU |
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MSI_ADDR_DEST_ID_CPU(dest_phys_id);
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msg.data =
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MSI_DATA_TRIGGER_EDGE |
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MSI_DATA_LEVEL_ASSERT |
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MSI_DATA_DELIVERY_FIXED |
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MSI_DATA_VECTOR(vector);
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pci_write_msi_msg(irq, &msg);
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irq_set_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq);
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return 0;
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}
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void arch_teardown_msi_irq(unsigned int irq)
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{
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destroy_irq(irq);
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}
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static void ia64_ack_msi_irq(struct irq_data *data)
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{
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irq_complete_move(data->irq);
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irq_move_irq(data);
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ia64_eoi();
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}
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static int ia64_msi_retrigger_irq(struct irq_data *data)
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{
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unsigned int vector = irq_to_vector(data->irq);
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ia64_resend_irq(vector);
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return 1;
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}
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/*
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* Generic ops used on most IA64 platforms.
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*/
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static struct irq_chip ia64_msi_chip = {
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.name = "PCI-MSI",
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.irq_mask = pci_msi_mask_irq,
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.irq_unmask = pci_msi_unmask_irq,
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.irq_ack = ia64_ack_msi_irq,
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#ifdef CONFIG_SMP
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.irq_set_affinity = ia64_set_msi_irq_affinity,
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#endif
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.irq_retrigger = ia64_msi_retrigger_irq,
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};
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#ifdef CONFIG_INTEL_IOMMU
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#ifdef CONFIG_SMP
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static int dmar_msi_set_affinity(struct irq_data *data,
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const struct cpumask *mask, bool force)
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{
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unsigned int irq = data->irq;
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struct irq_cfg *cfg = irq_cfg + irq;
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struct msi_msg msg;
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int cpu = cpumask_first_and(mask, cpu_online_mask);
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if (irq_prepare_move(irq, cpu))
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return -1;
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dmar_msi_read(irq, &msg);
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msg.data &= ~MSI_DATA_VECTOR_MASK;
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msg.data |= MSI_DATA_VECTOR(cfg->vector);
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msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;
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msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
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dmar_msi_write(irq, &msg);
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cpumask_copy(irq_data_get_affinity_mask(data), mask);
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return 0;
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}
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#endif /* CONFIG_SMP */
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static struct irq_chip dmar_msi_type = {
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.name = "DMAR_MSI",
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.irq_unmask = dmar_msi_unmask,
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.irq_mask = dmar_msi_mask,
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.irq_ack = ia64_ack_msi_irq,
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#ifdef CONFIG_SMP
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.irq_set_affinity = dmar_msi_set_affinity,
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#endif
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.irq_retrigger = ia64_msi_retrigger_irq,
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};
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static void
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msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
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{
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struct irq_cfg *cfg = irq_cfg + irq;
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unsigned dest;
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dest = cpu_physical_id(cpumask_first_and(&(irq_to_domain(irq)),
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cpu_online_mask));
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msg->address_hi = 0;
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msg->address_lo =
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MSI_ADDR_HEADER |
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MSI_ADDR_DEST_MODE_PHYS |
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MSI_ADDR_REDIRECTION_CPU |
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MSI_ADDR_DEST_ID_CPU(dest);
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msg->data =
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MSI_DATA_TRIGGER_EDGE |
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MSI_DATA_LEVEL_ASSERT |
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MSI_DATA_DELIVERY_FIXED |
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MSI_DATA_VECTOR(cfg->vector);
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}
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int dmar_alloc_hwirq(int id, int node, void *arg)
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{
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int irq;
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struct msi_msg msg;
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irq = create_irq();
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if (irq > 0) {
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irq_set_handler_data(irq, arg);
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irq_set_chip_and_handler_name(irq, &dmar_msi_type,
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handle_edge_irq, "edge");
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msi_compose_msg(NULL, irq, &msg);
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dmar_msi_write(irq, &msg);
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}
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return irq;
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}
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void dmar_free_hwirq(int irq)
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{
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irq_set_handler_data(irq, NULL);
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destroy_irq(irq);
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}
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#endif /* CONFIG_INTEL_IOMMU */
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