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d0f8b9c5a3
DSP_RUN needs to be disabled during firmware write otherwise we can end up with undefined behavior if writing to a dsp which is already running firmware. Signed-off-by: Danny Smith <dannys@axis.com> Signed-off-by: Robert Rosengren <robert.rosengren@axis.com> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@kernel.org>
137 lines
4 KiB
C
137 lines
4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ADAU17X1_H__
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#define __ADAU17X1_H__
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#include <linux/regmap.h>
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#include <linux/platform_data/adau17x1.h>
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#include "sigmadsp.h"
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enum adau17x1_type {
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ADAU1361,
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ADAU1761,
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ADAU1381,
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ADAU1781,
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};
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enum adau17x1_pll {
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ADAU17X1_PLL,
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};
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enum adau17x1_pll_src {
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ADAU17X1_PLL_SRC_MCLK,
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};
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enum adau17x1_clk_src {
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/* Automatically configure PLL based on the sample rate */
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ADAU17X1_CLK_SRC_PLL_AUTO,
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ADAU17X1_CLK_SRC_MCLK,
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ADAU17X1_CLK_SRC_PLL,
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};
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struct clk;
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struct adau {
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unsigned int sysclk;
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unsigned int pll_freq;
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struct clk *mclk;
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enum adau17x1_clk_src clk_src;
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enum adau17x1_type type;
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void (*switch_mode)(struct device *dev);
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unsigned int dai_fmt;
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uint8_t pll_regs[6];
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bool master;
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unsigned int tdm_slot[2];
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bool dsp_bypass[2];
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struct regmap *regmap;
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struct sigmadsp *sigmadsp;
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};
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int adau17x1_add_widgets(struct snd_soc_component *component);
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int adau17x1_add_routes(struct snd_soc_component *component);
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int adau17x1_probe(struct device *dev, struct regmap *regmap,
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enum adau17x1_type type, void (*switch_mode)(struct device *dev),
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const char *firmware_name);
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void adau17x1_remove(struct device *dev);
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int adau17x1_set_micbias_voltage(struct snd_soc_component *component,
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enum adau17x1_micbias_voltage micbias);
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bool adau17x1_readable_register(struct device *dev, unsigned int reg);
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bool adau17x1_volatile_register(struct device *dev, unsigned int reg);
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bool adau17x1_precious_register(struct device *dev, unsigned int reg);
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int adau17x1_resume(struct snd_soc_component *component);
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extern const struct snd_soc_dai_ops adau17x1_dai_ops;
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int adau17x1_setup_firmware(struct snd_soc_component *component,
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unsigned int rate);
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bool adau17x1_has_dsp(struct adau *adau);
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#define ADAU17X1_CLOCK_CONTROL 0x4000
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#define ADAU17X1_PLL_CONTROL 0x4002
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#define ADAU17X1_REC_POWER_MGMT 0x4009
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#define ADAU17X1_MICBIAS 0x4010
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#define ADAU17X1_SERIAL_PORT0 0x4015
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#define ADAU17X1_SERIAL_PORT1 0x4016
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#define ADAU17X1_CONVERTER0 0x4017
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#define ADAU17X1_CONVERTER1 0x4018
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#define ADAU17X1_LEFT_INPUT_DIGITAL_VOL 0x401a
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#define ADAU17X1_RIGHT_INPUT_DIGITAL_VOL 0x401b
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#define ADAU17X1_ADC_CONTROL 0x4019
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#define ADAU17X1_PLAY_POWER_MGMT 0x4029
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#define ADAU17X1_DAC_CONTROL0 0x402a
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#define ADAU17X1_DAC_CONTROL1 0x402b
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#define ADAU17X1_DAC_CONTROL2 0x402c
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#define ADAU17X1_SERIAL_PORT_PAD 0x402d
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#define ADAU17X1_CONTROL_PORT_PAD0 0x402f
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#define ADAU17X1_CONTROL_PORT_PAD1 0x4030
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#define ADAU17X1_DSP_SAMPLING_RATE 0x40eb
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#define ADAU17X1_SERIAL_INPUT_ROUTE 0x40f2
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#define ADAU17X1_SERIAL_OUTPUT_ROUTE 0x40f3
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#define ADAU17X1_DSP_ENABLE 0x40f5
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#define ADAU17X1_DSP_RUN 0x40f6
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#define ADAU17X1_SERIAL_SAMPLING_RATE 0x40f8
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#define ADAU17X1_SERIAL_PORT0_BCLK_POL BIT(4)
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#define ADAU17X1_SERIAL_PORT0_LRCLK_POL BIT(3)
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#define ADAU17X1_SERIAL_PORT0_MASTER BIT(0)
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#define ADAU17X1_SERIAL_PORT1_DELAY1 0x00
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#define ADAU17X1_SERIAL_PORT1_DELAY0 0x01
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#define ADAU17X1_SERIAL_PORT1_DELAY8 0x02
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#define ADAU17X1_SERIAL_PORT1_DELAY16 0x03
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#define ADAU17X1_SERIAL_PORT1_DELAY_MASK 0x03
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#define ADAU17X1_CLOCK_CONTROL_INFREQ_MASK 0x6
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#define ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL BIT(3)
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#define ADAU17X1_CLOCK_CONTROL_SYSCLK_EN BIT(0)
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#define ADAU17X1_SERIAL_PORT1_BCLK64 (0x0 << 5)
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#define ADAU17X1_SERIAL_PORT1_BCLK32 (0x1 << 5)
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#define ADAU17X1_SERIAL_PORT1_BCLK48 (0x2 << 5)
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#define ADAU17X1_SERIAL_PORT1_BCLK128 (0x3 << 5)
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#define ADAU17X1_SERIAL_PORT1_BCLK256 (0x4 << 5)
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#define ADAU17X1_SERIAL_PORT1_BCLK_MASK (0x7 << 5)
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#define ADAU17X1_SERIAL_PORT0_STEREO (0x0 << 1)
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#define ADAU17X1_SERIAL_PORT0_TDM4 (0x1 << 1)
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#define ADAU17X1_SERIAL_PORT0_TDM8 (0x2 << 1)
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#define ADAU17X1_SERIAL_PORT0_TDM_MASK (0x3 << 1)
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#define ADAU17X1_SERIAL_PORT0_PULSE_MODE BIT(5)
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#define ADAU17X1_CONVERTER0_DAC_PAIR(x) (((x) - 1) << 5)
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#define ADAU17X1_CONVERTER0_DAC_PAIR_MASK (0x3 << 5)
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#define ADAU17X1_CONVERTER1_ADC_PAIR(x) ((x) - 1)
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#define ADAU17X1_CONVERTER1_ADC_PAIR_MASK 0x3
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#define ADAU17X1_CONVERTER0_CONVSR_MASK 0x7
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#define ADAU17X1_CONVERTER0_ADOSR BIT(3)
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#endif
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