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d7a7ca5781
The SoC information first_gpio field is always equal to 0, and the last_gpio field is the index of the last entry in the pinmux_gpios array. Replace the first_gpio and last_gpio fields by a nr_gpios field, and initialize it to ARRAY_SIZE(pinmux_gpios). Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
175 lines
3.7 KiB
C
175 lines
3.7 KiB
C
/*
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* SuperH Pin Function Controller GPIO driver.
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*
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* Copyright (C) 2008 Magnus Damm
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* Copyright (C) 2009 - 2012 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME " gpio: " fmt
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#include <linux/device.h>
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#include <linux/gpio.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include "core.h"
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struct sh_pfc_chip {
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struct sh_pfc *pfc;
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struct gpio_chip gpio_chip;
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};
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static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc)
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{
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return container_of(gc, struct sh_pfc_chip, gpio_chip);
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}
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static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
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{
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return gpio_to_pfc_chip(gc)->pfc;
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}
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static int sh_gpio_request(struct gpio_chip *gc, unsigned offset)
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{
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return pinctrl_request_gpio(offset);
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}
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static void sh_gpio_free(struct gpio_chip *gc, unsigned offset)
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{
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pinctrl_free_gpio(offset);
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}
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static void sh_gpio_set_value(struct sh_pfc *pfc, unsigned gpio, int value)
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{
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struct pinmux_data_reg *dr = NULL;
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int bit = 0;
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if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0)
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BUG();
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else
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sh_pfc_write_bit(dr, bit, value);
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}
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static int sh_gpio_get_value(struct sh_pfc *pfc, unsigned gpio)
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{
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struct pinmux_data_reg *dr = NULL;
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int bit = 0;
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if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0)
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return -EINVAL;
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return sh_pfc_read_bit(dr, bit);
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}
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static int sh_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
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{
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return pinctrl_gpio_direction_input(offset);
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}
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static int sh_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
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int value)
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{
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sh_gpio_set_value(gpio_to_pfc(gc), offset, value);
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return pinctrl_gpio_direction_output(offset);
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}
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static int sh_gpio_get(struct gpio_chip *gc, unsigned offset)
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{
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return sh_gpio_get_value(gpio_to_pfc(gc), offset);
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}
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static void sh_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
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{
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sh_gpio_set_value(gpio_to_pfc(gc), offset, value);
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}
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static int sh_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
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{
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struct sh_pfc *pfc = gpio_to_pfc(gc);
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pinmux_enum_t enum_id;
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pinmux_enum_t *enum_ids;
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int i, k, pos;
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pos = 0;
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enum_id = 0;
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while (1) {
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pos = sh_pfc_gpio_to_enum(pfc, offset, pos, &enum_id);
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if (pos <= 0 || !enum_id)
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break;
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for (i = 0; i < pfc->info->gpio_irq_size; i++) {
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enum_ids = pfc->info->gpio_irq[i].enum_ids;
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for (k = 0; enum_ids[k]; k++) {
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if (enum_ids[k] == enum_id)
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return pfc->info->gpio_irq[i].irq;
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}
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}
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}
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return -ENOSYS;
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}
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static void sh_pfc_gpio_setup(struct sh_pfc_chip *chip)
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{
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struct sh_pfc *pfc = chip->pfc;
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struct gpio_chip *gc = &chip->gpio_chip;
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gc->request = sh_gpio_request;
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gc->free = sh_gpio_free;
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gc->direction_input = sh_gpio_direction_input;
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gc->get = sh_gpio_get;
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gc->direction_output = sh_gpio_direction_output;
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gc->set = sh_gpio_set;
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gc->to_irq = sh_gpio_to_irq;
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gc->label = pfc->info->name;
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gc->owner = THIS_MODULE;
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gc->base = 0;
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gc->ngpio = pfc->info->nr_gpios;
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}
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int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
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{
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struct sh_pfc_chip *chip;
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int ret;
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chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL);
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if (unlikely(!chip))
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return -ENOMEM;
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chip->pfc = pfc;
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sh_pfc_gpio_setup(chip);
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ret = gpiochip_add(&chip->gpio_chip);
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if (unlikely(ret < 0))
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return ret;
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pfc->gpio = chip;
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pr_info("%s handling gpio 0 -> %u\n",
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pfc->info->name, pfc->info->nr_gpios - 1);
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return 0;
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}
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int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc)
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{
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struct sh_pfc_chip *chip = pfc->gpio;
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int ret;
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ret = gpiochip_remove(&chip->gpio_chip);
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if (unlikely(ret < 0))
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return ret;
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pfc->gpio = NULL;
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return 0;
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}
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