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![Tejun Heo](/assets/img/avatar_default.png)
Currently reset methods are not specified directly in the ata_port_operations table. If a LLD wants to use custom reset methods, it should construct and use a error_handler which uses those reset methods. It's done this way for two reasons. First, the ops table already contained too many methods and adding four more of them would noticeably increase the amount of necessary boilerplate code all over low level drivers. Second, as ->error_handler uses those reset methods, it can get confusing. ie. By overriding ->error_handler, those reset ops can be made useless making layering a bit hazy. Now that ops table uses inheritance, the first problem doesn't exist anymore. The second isn't completely solved but is relieved by providing default values - most drivers can just override what it has implemented and don't have to concern itself about higher level callbacks. In fact, there currently is no driver which actually modifies error handling behavior. Drivers which override ->error_handler just wraps the standard error handler only to prepare the controller for EH. I don't think making ops layering strict has any noticeable benefit. This patch makes ->prereset, ->softreset, ->hardreset, ->postreset and their PMP counterparts propoer ops. Default ops are provided in the base ops tables and drivers are converted to override individual reset methods instead of creating custom error_handler. * ata_std_error_handler() doesn't use sata_std_hardreset() if SCRs aren't accessible. sata_promise doesn't need to use separate error_handlers for PATA and SATA anymore. * softreset is broken for sata_inic162x and sata_sx4. As libata now always prefers hardreset, this doesn't really matter but the ops are forced to NULL using ATA_OP_NULL for documentation purpose. * pata_hpt374 needs to use different prereset for the first and second PCI functions. This used to be done by branching from hpt374_error_handler(). The proper way to do this is to use separate ops and port_info tables for each function. Converted. Signed-off-by: Tejun Heo <htejun@gmail.com>
215 lines
5.5 KiB
C
215 lines
5.5 KiB
C
/*
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* pata_opti.c - ATI PATA for new ATA layer
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* (C) 2005 Red Hat Inc
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* Alan Cox <alan@redhat.com>
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*
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* Based on
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* linux/drivers/ide/pci/opti621.c Version 0.7 Sept 10, 2002
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*
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* Copyright (C) 1996-1998 Linus Torvalds & authors (see below)
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*
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* Authors:
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* Jaromir Koutek <miri@punknet.cz>,
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* Jan Harkes <jaharkes@cwi.nl>,
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* Mark Lord <mlord@pobox.com>
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* Some parts of code are from ali14xx.c and from rz1000.c.
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*
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* Also consulted the FreeBSD prototype driver by Kevin Day to try
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* and resolve some confusions. Further documentation can be found in
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* Ralf Brown's interrupt list
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*
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* If you have other variants of the Opti range (Viper/Vendetta) please
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* try this driver with those PCI idents and report back. For the later
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* chips see the pata_optidma driver
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#define DRV_NAME "pata_opti"
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#define DRV_VERSION "0.2.9"
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enum {
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READ_REG = 0, /* index of Read cycle timing register */
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WRITE_REG = 1, /* index of Write cycle timing register */
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CNTRL_REG = 3, /* index of Control register */
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STRAP_REG = 5, /* index of Strap register */
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MISC_REG = 6 /* index of Miscellaneous register */
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};
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/**
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* opti_pre_reset - probe begin
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* @link: ATA link
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* @deadline: deadline jiffies for the operation
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*
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* Set up cable type and use generic probe init
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*/
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static int opti_pre_reset(struct ata_link *link, unsigned long deadline)
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{
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struct ata_port *ap = link->ap;
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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static const struct pci_bits opti_enable_bits[] = {
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{ 0x45, 1, 0x80, 0x00 },
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{ 0x40, 1, 0x08, 0x00 }
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};
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if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no]))
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return -ENOENT;
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return ata_std_prereset(link, deadline);
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}
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/**
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* opti_write_reg - control register setup
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* @ap: ATA port
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* @value: value
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* @reg: control register number
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*
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* The Opti uses magic 'trapdoor' register accesses to do configuration
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* rather than using PCI space as other controllers do. The double inw
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* on the error register activates configuration mode. We can then write
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* the control register
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*/
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static void opti_write_reg(struct ata_port *ap, u8 val, int reg)
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{
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void __iomem *regio = ap->ioaddr.cmd_addr;
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/* These 3 unlock the control register access */
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ioread16(regio + 1);
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ioread16(regio + 1);
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iowrite8(3, regio + 2);
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/* Do the I/O */
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iowrite8(val, regio + reg);
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/* Relock */
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iowrite8(0x83, regio + 2);
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}
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/**
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* opti_set_piomode - set initial PIO mode data
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* @ap: ATA interface
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* @adev: ATA device
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*
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* Called to do the PIO mode setup. Timing numbers are taken from
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* the FreeBSD driver then pre computed to keep the code clean. There
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* are two tables depending on the hardware clock speed.
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*/
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static void opti_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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struct ata_device *pair = ata_dev_pair(adev);
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int clock;
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int pio = adev->pio_mode - XFER_PIO_0;
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void __iomem *regio = ap->ioaddr.cmd_addr;
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u8 addr;
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/* Address table precomputed with prefetch off and a DCLK of 2 */
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static const u8 addr_timing[2][5] = {
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{ 0x30, 0x20, 0x20, 0x10, 0x10 },
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{ 0x20, 0x20, 0x10, 0x10, 0x10 }
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};
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static const u8 data_rec_timing[2][5] = {
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{ 0x6B, 0x56, 0x42, 0x32, 0x31 },
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{ 0x58, 0x44, 0x32, 0x22, 0x21 }
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};
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iowrite8(0xff, regio + 5);
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clock = ioread16(regio + 5) & 1;
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/*
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* As with many controllers the address setup time is shared
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* and must suit both devices if present.
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*/
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addr = addr_timing[clock][pio];
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if (pair) {
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/* Hardware constraint */
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u8 pair_addr = addr_timing[clock][pair->pio_mode - XFER_PIO_0];
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if (pair_addr > addr)
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addr = pair_addr;
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}
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/* Commence primary programming sequence */
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opti_write_reg(ap, adev->devno, MISC_REG);
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opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG);
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opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG);
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opti_write_reg(ap, addr, MISC_REG);
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/* Programming sequence complete, override strapping */
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opti_write_reg(ap, 0x85, CNTRL_REG);
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}
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static struct scsi_host_template opti_sht = {
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ATA_PIO_SHT(DRV_NAME),
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};
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static struct ata_port_operations opti_port_ops = {
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.inherits = &ata_sff_port_ops,
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.cable_detect = ata_cable_40wire,
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.set_piomode = opti_set_piomode,
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.prereset = opti_pre_reset,
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};
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static int opti_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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{
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static const struct ata_port_info info = {
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.flags = ATA_FLAG_SLAVE_POSS,
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.pio_mask = 0x1f,
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.port_ops = &opti_port_ops
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};
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const struct ata_port_info *ppi[] = { &info, NULL };
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static int printed_version;
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if (!printed_version++)
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dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n");
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return ata_pci_init_one(dev, ppi, &opti_sht, NULL);
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}
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static const struct pci_device_id opti[] = {
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{ PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 },
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{ PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 1 },
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{ },
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};
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static struct pci_driver opti_pci_driver = {
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.name = DRV_NAME,
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.id_table = opti,
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.probe = opti_init_one,
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.remove = ata_pci_remove_one,
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#ifdef CONFIG_PM
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.suspend = ata_pci_device_suspend,
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.resume = ata_pci_device_resume,
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#endif
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};
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static int __init opti_init(void)
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{
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return pci_register_driver(&opti_pci_driver);
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}
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static void __exit opti_exit(void)
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{
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pci_unregister_driver(&opti_pci_driver);
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}
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MODULE_AUTHOR("Alan Cox");
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MODULE_DESCRIPTION("low-level driver for Opti 621/621X");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, opti);
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MODULE_VERSION(DRV_VERSION);
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module_init(opti_init);
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module_exit(opti_exit);
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