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0d45062cfc
This adds initial support for micro-DPU (uDPU) board which is based on Armada-3720 SoC. micro-DPU is the single-port FTTdp distribution point unit made by Methode Electronics which offers complete modularity with replaceable SFP modules both for uplink and downlink (G.hn over twisted-pair, G.hn over coax, 1G and 2.5G Ethernet over Cat-5e cable). On-board features: - 512 MiB DDR3 - 2 x 2.5G SFP via HSGMII SERDES interface to the A3720 SoC - USB 2.0 Type-C connector - 4GB eMMC - ETSI TS 101548 reverse powering via twisted pair (RJ45) or coax (F Type) Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Luis Torres <luis.torres@methode.com> Cc: Scott Roberts <scott.roberts@telus.com> Cc: Paul Arola <paul.arola@telus.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Gregory Clement <gregory.clement@bootlin.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
162 lines
2.8 KiB
Text
162 lines
2.8 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device tree for the uDPU board.
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* Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
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* Copyright (C) 2016 Marvell
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* Copyright (C) 2019 Methode Electronics
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* Copyright (C) 2019 Telus
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*
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* Vladimir Vid <vladimir.vid@sartura.hr>
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include "armada-372x.dtsi"
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/ {
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model = "Methode uDPU Board";
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compatible = "methode,udpu", "marvell,armada3720";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
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};
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leds {
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pinctrl-names = "default";
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compatible = "gpio-leds";
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power1 {
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label = "udpu:green:power";
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gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
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};
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power2 {
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label = "udpu:red:power";
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gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
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};
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network1 {
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label = "udpu:green:network";
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gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
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};
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network2 {
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label = "udpu:red:network";
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gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
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};
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alarm1 {
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label = "udpu:green:alarm";
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gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;
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};
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alarm2 {
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label = "udpu:red:alarm";
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gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;
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};
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};
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sfp_eth0: sfp-eth0 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c0>;
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los-gpio = <&gpiosb 2 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpiosb 3 GPIO_ACTIVE_LOW>;
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tx-disable-gpio = <&gpiosb 4 GPIO_ACTIVE_HIGH>;
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tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>;
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};
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sfp_eth1: sfp-eth1 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c1>;
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los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;
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tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;
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tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;
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};
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};
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&sdhci0 {
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status = "okay";
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bus-width = <8>;
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mmc-ddr-1_8v;
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mmc-hs400-1_8v;
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marvell,pad-type = "fixed-1-8v";
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non-removable;
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no-sd;
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no-sdio;
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};
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&spi0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&spi_quad_pins>;
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m25p80@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <54000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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/* only bootloader is located on the SPI */
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partition@0 {
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label = "uboot";
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reg = <0 0x400000>;
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};
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};
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};
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};
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&i2c0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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};
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&i2c1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pins>;
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lm75@48 {
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status = "okay";
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compatible = "lm75";
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reg = <0x48>;
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};
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lm75@49 {
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status = "okay";
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compatible = "lm75";
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reg = <0x49>;
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};
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};
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ð0 {
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phy-mode = "sgmii";
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status = "okay";
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managed = "in-band-status";
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sfp = <&sfp_eth0>;
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};
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ð1 {
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phy-mode = "sgmii";
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status = "okay";
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managed = "in-band-status";
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sfp = <&sfp_eth1>;
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};
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&usb3 {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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