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7242265213
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. uniphier_aio_remove() returned zero unconditionally. Make it return void instead and convert all users to struct platform_device::remove_new(). Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20231013221945.1489203-16-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
356 lines
8 KiB
C
356 lines
8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Socionext UniPhier AIO ALSA driver for LD11/LD20.
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//
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// Copyright (c) 2016-2018 Socionext Inc.
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#include <linux/module.h>
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#include "aio.h"
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static const struct uniphier_aio_spec uniphier_aio_ld11[] = {
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/* for HDMI PCM In, Pin:AI1Dx */
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{
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.name = AUD_NAME_PCMIN1,
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.gname = AUD_GNAME_HDMI,
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.swm = {
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.type = PORT_TYPE_I2S,
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.dir = PORT_DIR_INPUT,
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.rb = { 21, 14, },
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.ch = { 21, 14, },
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.iif = { 5, 3, },
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.iport = { 0, AUD_HW_PCMIN1, },
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},
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},
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/* for SIF In, Pin:AI2Dx */
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{
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.name = AUD_NAME_PCMIN2,
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.swm = {
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.type = PORT_TYPE_I2S,
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.dir = PORT_DIR_INPUT,
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.rb = { 22, 15, },
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.ch = { 22, 15, },
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.iif = { 6, 4, },
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.iport = { 1, AUD_HW_PCMIN2, },
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},
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},
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/* for Line In, Pin:AI3Dx */
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{
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.name = AUD_NAME_PCMIN3,
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.gname = AUD_GNAME_LINE,
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.swm = {
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.type = PORT_TYPE_EVE,
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.dir = PORT_DIR_INPUT,
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.rb = { 23, 16, },
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.ch = { 23, 16, },
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.iif = { 7, 5, },
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.iport = { 2, AUD_HW_PCMIN3, },
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},
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},
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/* for S/PDIF In, Pin:AI1IEC */
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{
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.name = AUD_NAME_IECIN1,
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.gname = AUD_GNAME_IEC,
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.swm = {
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.type = PORT_TYPE_SPDIF,
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.dir = PORT_DIR_INPUT,
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.rb = { 26, 17, },
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.ch = { 26, 17, },
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.iif = { 10, 6, },
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.iport = { 3, AUD_HW_IECIN1, },
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},
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},
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/* for Speaker, Pin:AO1Dx */
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{
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.name = AUD_NAME_HPCMOUT1,
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.swm = {
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.type = PORT_TYPE_I2S,
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.dir = PORT_DIR_OUTPUT,
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.rb = { 0, 0, },
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.ch = { 0, 0, },
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.oif = { 0, 0, },
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.oport = { 0, AUD_HW_HPCMOUT1, },
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},
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},
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/* for HDMI PCM, Pin:AO2Dx */
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{
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.name = AUD_NAME_PCMOUT1,
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.gname = AUD_GNAME_HDMI,
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.swm = {
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.type = PORT_TYPE_I2S,
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.dir = PORT_DIR_OUTPUT,
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.rb = { 0, 0, },
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.ch = { 0, 0, },
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.oif = { 0, 0, },
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.oport = { 3, AUD_HW_PCMOUT1, },
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},
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},
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/* for Line Out, Pin:LO2_x */
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{
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.name = AUD_NAME_PCMOUT2,
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.gname = AUD_GNAME_LINE,
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.swm = {
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.type = PORT_TYPE_EVE,
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.dir = PORT_DIR_OUTPUT,
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.rb = { 2, 2, },
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.ch = { 2, 2, },
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.oif = { 2, 2, },
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.oport = { 1, AUD_HW_PCMOUT2, },
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},
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},
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/* for Headphone, Pin:HP1_x */
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{
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.name = AUD_NAME_PCMOUT3,
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.swm = {
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.type = PORT_TYPE_EVE,
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.dir = PORT_DIR_OUTPUT,
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.rb = { 3, 3, },
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.ch = { 3, 3, },
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.oif = { 3, 3, },
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.oport = { 2, AUD_HW_PCMOUT3, },
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},
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},
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/* for HW Sampling Rate Converter */
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{
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.name = AUD_NAME_EPCMOUT2,
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.swm = {
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.type = PORT_TYPE_CONV,
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.dir = PORT_DIR_OUTPUT,
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.rb = { 7, 5, },
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.ch = { 7, 5, },
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.oif = { 7, 5, },
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.oport = { 6, AUD_HW_EPCMOUT2, },
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.och = { 17, 12, },
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.iif = { 1, 1, },
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},
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},
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/* for HW Sampling Rate Converter 2 */
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{
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.name = AUD_NAME_EPCMOUT3,
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.swm = {
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.type = PORT_TYPE_CONV,
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.dir = PORT_DIR_OUTPUT,
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.rb = { 8, 6, },
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.ch = { 8, 6, },
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.oif = { 8, 6, },
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.oport = { 7, AUD_HW_EPCMOUT3, },
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.och = { 18, 13, },
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.iif = { 2, 2, },
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},
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},
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/* for S/PDIF Out, Pin:AO1IEC */
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{
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.name = AUD_NAME_HIECOUT1,
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.gname = AUD_GNAME_IEC,
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.swm = {
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.type = PORT_TYPE_SPDIF,
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.dir = PORT_DIR_OUTPUT,
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.rb = { 1, 1, },
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.ch = { 1, 1, },
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.oif = { 1, 1, },
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.oport = { 12, AUD_HW_HIECOUT1, },
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},
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},
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/* for S/PDIF Out, Pin:AO1IEC, Compress */
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{
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.name = AUD_NAME_HIECCOMPOUT1,
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.gname = AUD_GNAME_IEC,
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.swm = {
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.type = PORT_TYPE_SPDIF,
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.dir = PORT_DIR_OUTPUT,
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.rb = { 1, 1, },
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.ch = { 1, 1, },
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.oif = { 1, 1, },
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.oport = { 12, AUD_HW_HIECOUT1, },
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},
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},
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};
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static const struct uniphier_aio_pll uniphier_aio_pll_ld11[] = {
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[AUD_PLL_A1] = { .enable = true, },
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[AUD_PLL_F1] = { .enable = true, },
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[AUD_PLL_A2] = { .enable = true, },
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[AUD_PLL_F2] = { .enable = true, },
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[AUD_PLL_APLL] = { .enable = true, },
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[AUD_PLL_RX0] = { .enable = true, },
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[AUD_PLL_USB0] = { .enable = true, },
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[AUD_PLL_HSC0] = { .enable = true, },
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};
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static struct snd_soc_dai_driver uniphier_aio_dai_ld11[] = {
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{
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.name = AUD_GNAME_HDMI,
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.playback = {
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.stream_name = AUD_NAME_PCMOUT1,
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.formats = SNDRV_PCM_FMTBIT_S32_LE,
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.rates = SNDRV_PCM_RATE_48000,
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.channels_min = 2,
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.channels_max = 2,
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},
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.capture = {
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.stream_name = AUD_NAME_PCMIN1,
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.formats = SNDRV_PCM_FMTBIT_S32_LE,
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.rates = SNDRV_PCM_RATE_48000 |
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SNDRV_PCM_RATE_44100 |
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SNDRV_PCM_RATE_32000,
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.channels_min = 2,
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.channels_max = 2,
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},
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.ops = &uniphier_aio_i2s_ld11_ops,
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},
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{
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.name = AUD_NAME_PCMIN2,
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.capture = {
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.stream_name = AUD_NAME_PCMIN2,
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.formats = SNDRV_PCM_FMTBIT_S32_LE,
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.rates = SNDRV_PCM_RATE_48000,
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.channels_min = 2,
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.channels_max = 2,
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},
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.ops = &uniphier_aio_i2s_ld11_ops,
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},
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{
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.name = AUD_GNAME_LINE,
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.playback = {
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.stream_name = AUD_NAME_PCMOUT2,
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.formats = SNDRV_PCM_FMTBIT_S32_LE,
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.rates = SNDRV_PCM_RATE_48000,
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.channels_min = 2,
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.channels_max = 2,
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},
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.capture = {
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.stream_name = AUD_NAME_PCMIN3,
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.formats = SNDRV_PCM_FMTBIT_S32_LE,
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.rates = SNDRV_PCM_RATE_48000,
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.channels_min = 2,
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.channels_max = 2,
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},
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.ops = &uniphier_aio_i2s_ld11_ops,
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},
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{
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.name = AUD_NAME_HPCMOUT1,
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.playback = {
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.stream_name = AUD_NAME_HPCMOUT1,
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.formats = SNDRV_PCM_FMTBIT_S32_LE,
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.rates = SNDRV_PCM_RATE_48000,
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.channels_min = 2,
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.channels_max = 8,
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},
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.ops = &uniphier_aio_i2s_ld11_ops,
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},
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{
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.name = AUD_NAME_PCMOUT3,
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.playback = {
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.stream_name = AUD_NAME_PCMOUT3,
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.formats = SNDRV_PCM_FMTBIT_S32_LE,
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.rates = SNDRV_PCM_RATE_48000,
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.channels_min = 2,
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.channels_max = 2,
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},
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.ops = &uniphier_aio_i2s_ld11_ops,
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},
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{
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.name = AUD_NAME_HIECOUT1,
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.playback = {
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.stream_name = AUD_NAME_HIECOUT1,
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.formats = SNDRV_PCM_FMTBIT_S32_LE,
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.rates = SNDRV_PCM_RATE_48000,
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.channels_min = 2,
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.channels_max = 2,
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},
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.ops = &uniphier_aio_spdif_ld11_ops,
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},
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{
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.name = AUD_NAME_EPCMOUT2,
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.playback = {
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.stream_name = AUD_NAME_EPCMOUT2,
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.formats = SNDRV_PCM_FMTBIT_S32_LE,
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.rates = SNDRV_PCM_RATE_48000 |
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SNDRV_PCM_RATE_44100 |
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SNDRV_PCM_RATE_32000,
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.channels_min = 2,
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.channels_max = 2,
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},
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.ops = &uniphier_aio_i2s_ld11_ops,
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},
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{
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.name = AUD_NAME_EPCMOUT3,
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.playback = {
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.stream_name = AUD_NAME_EPCMOUT3,
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.formats = SNDRV_PCM_FMTBIT_S32_LE,
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.rates = SNDRV_PCM_RATE_48000 |
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SNDRV_PCM_RATE_44100 |
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SNDRV_PCM_RATE_32000,
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.channels_min = 2,
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.channels_max = 2,
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},
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.ops = &uniphier_aio_i2s_ld11_ops,
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},
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{
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.name = AUD_NAME_HIECCOMPOUT1,
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.playback = {
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.stream_name = AUD_NAME_HIECCOMPOUT1,
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.channels_min = 1,
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.channels_max = 1,
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},
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.ops = &uniphier_aio_spdif_ld11_ops2,
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},
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};
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static const struct uniphier_aio_chip_spec uniphier_aio_ld11_spec = {
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.specs = uniphier_aio_ld11,
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.num_specs = ARRAY_SIZE(uniphier_aio_ld11),
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.dais = uniphier_aio_dai_ld11,
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.num_dais = ARRAY_SIZE(uniphier_aio_dai_ld11),
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.plls = uniphier_aio_pll_ld11,
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.num_plls = ARRAY_SIZE(uniphier_aio_pll_ld11),
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.addr_ext = 0,
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};
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static const struct uniphier_aio_chip_spec uniphier_aio_ld20_spec = {
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.specs = uniphier_aio_ld11,
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.num_specs = ARRAY_SIZE(uniphier_aio_ld11),
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.dais = uniphier_aio_dai_ld11,
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.num_dais = ARRAY_SIZE(uniphier_aio_dai_ld11),
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.plls = uniphier_aio_pll_ld11,
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.num_plls = ARRAY_SIZE(uniphier_aio_pll_ld11),
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.addr_ext = 1,
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};
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static const struct of_device_id uniphier_aio_of_match[] __maybe_unused = {
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{
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.compatible = "socionext,uniphier-ld11-aio",
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.data = &uniphier_aio_ld11_spec,
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},
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{
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.compatible = "socionext,uniphier-ld20-aio",
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.data = &uniphier_aio_ld20_spec,
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, uniphier_aio_of_match);
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static struct platform_driver uniphier_aio_driver = {
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.driver = {
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.name = "snd-uniphier-aio-ld11",
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.of_match_table = of_match_ptr(uniphier_aio_of_match),
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},
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.probe = uniphier_aio_probe,
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.remove_new = uniphier_aio_remove,
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};
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module_platform_driver(uniphier_aio_driver);
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MODULE_AUTHOR("Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>");
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MODULE_DESCRIPTION("UniPhier LD11/LD20 AIO driver.");
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MODULE_LICENSE("GPL v2");
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