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![Linus Torvalds](/assets/img/avatar_default.png)
Pull x86 cache allocation interface from Thomas Gleixner: "This provides support for Intel's Cache Allocation Technology, a cache partitioning mechanism. The interface is odd, but the hardware interface of that CAT stuff is odd as well. We tried hard to come up with an abstraction, but that only allows rather simple partitioning, but no way of sharing and dealing with the per package nature of this mechanism. In the end we decided to expose the allocation bitmaps directly so all combinations of the hardware can be utilized. There are two ways of associating a cache partition: - Task A task can be added to a resource group. It uses the cache partition associated to the group. - CPU All tasks which are not member of a resource group use the group to which the CPU they are running on is associated with. That allows for simple CPU based partitioning schemes. The main expected user sare: - Virtualization so a VM can only trash only the associated part of the cash w/o disturbing others - Real-Time systems to seperate RT and general workloads. - Latency sensitive enterprise workloads - In theory this also can be used to protect against cache side channel attacks" [ Intel RDT is "Resource Director Technology". The interface really is rather odd and very specific, which delayed this pull request while I was thinking about it. The pull request itself came in early during the merge window, I just delayed it until things had calmed down and I had more time. But people tell me they'll use this, and the good news is that it is _so_ specific that it's rather independent of anything else, and no user is going to depend on the interface since it's pretty rare. So if push comes to shove, we can just remove the interface and nothing will break ] * 'x86-cache-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (31 commits) x86/intel_rdt: Implement show_options() for resctrlfs x86/intel_rdt: Call intel_rdt_sched_in() with preemption disabled x86/intel_rdt: Update task closid immediately on CPU in rmdir and unmount x86/intel_rdt: Fix setting of closid when adding CPUs to a group x86/intel_rdt: Update percpu closid immeditately on CPUs affected by changee x86/intel_rdt: Reset per cpu closids on unmount x86/intel_rdt: Select KERNFS when enabling INTEL_RDT_A x86/intel_rdt: Prevent deadlock against hotplug lock x86/intel_rdt: Protect info directory from removal x86/intel_rdt: Add info files to Documentation x86/intel_rdt: Export the minimum number of set mask bits in sysfs x86/intel_rdt: Propagate error in rdt_mount() properly x86/intel_rdt: Add a missing #include MAINTAINERS: Add maintainer for Intel RDT resource allocation x86/intel_rdt: Add scheduler hook x86/intel_rdt: Add schemata file x86/intel_rdt: Add tasks files x86/intel_rdt: Add cpus file x86/intel_rdt: Add mkdir to resctrl file system x86/intel_rdt: Add "info" files to resctrl file system ...
662 lines
17 KiB
C
662 lines
17 KiB
C
/*
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* cacheinfo support - processor cache information via sysfs
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*
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* Based on arch/x86/kernel/cpu/intel_cacheinfo.c
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* Author: Sudeep Holla <sudeep.holla@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/acpi.h>
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#include <linux/bitops.h>
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#include <linux/cacheinfo.h>
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#include <linux/compiler.h>
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#include <linux/cpu.h>
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#include <linux/device.h>
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#include <linux/init.h>
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#include <linux/of.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/smp.h>
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#include <linux/sysfs.h>
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/* pointer to per cpu cacheinfo */
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static DEFINE_PER_CPU(struct cpu_cacheinfo, ci_cpu_cacheinfo);
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#define ci_cacheinfo(cpu) (&per_cpu(ci_cpu_cacheinfo, cpu))
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#define cache_leaves(cpu) (ci_cacheinfo(cpu)->num_leaves)
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#define per_cpu_cacheinfo(cpu) (ci_cacheinfo(cpu)->info_list)
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struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu)
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{
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return ci_cacheinfo(cpu);
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}
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#ifdef CONFIG_OF
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static int cache_setup_of_node(unsigned int cpu)
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{
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struct device_node *np;
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struct cacheinfo *this_leaf;
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struct device *cpu_dev = get_cpu_device(cpu);
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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unsigned int index = 0;
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/* skip if of_node is already populated */
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if (this_cpu_ci->info_list->of_node)
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return 0;
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if (!cpu_dev) {
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pr_err("No cpu device for CPU %d\n", cpu);
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return -ENODEV;
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}
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np = cpu_dev->of_node;
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if (!np) {
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pr_err("Failed to find cpu%d device node\n", cpu);
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return -ENOENT;
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}
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while (index < cache_leaves(cpu)) {
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this_leaf = this_cpu_ci->info_list + index;
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if (this_leaf->level != 1)
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np = of_find_next_cache_node(np);
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else
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np = of_node_get(np);/* cpu node itself */
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if (!np)
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break;
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this_leaf->of_node = np;
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index++;
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}
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if (index != cache_leaves(cpu)) /* not all OF nodes populated */
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return -ENOENT;
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return 0;
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}
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static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
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struct cacheinfo *sib_leaf)
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{
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return sib_leaf->of_node == this_leaf->of_node;
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}
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/* OF properties to query for a given cache type */
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struct cache_type_info {
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const char *size_prop;
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const char *line_size_props[2];
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const char *nr_sets_prop;
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};
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static const struct cache_type_info cache_type_info[] = {
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{
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.size_prop = "cache-size",
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.line_size_props = { "cache-line-size",
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"cache-block-size", },
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.nr_sets_prop = "cache-sets",
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}, {
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.size_prop = "i-cache-size",
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.line_size_props = { "i-cache-line-size",
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"i-cache-block-size", },
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.nr_sets_prop = "i-cache-sets",
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}, {
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.size_prop = "d-cache-size",
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.line_size_props = { "d-cache-line-size",
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"d-cache-block-size", },
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.nr_sets_prop = "d-cache-sets",
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},
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};
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static inline int get_cacheinfo_idx(enum cache_type type)
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{
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if (type == CACHE_TYPE_UNIFIED)
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return 0;
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return type;
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}
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static void cache_size(struct cacheinfo *this_leaf)
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{
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const char *propname;
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const __be32 *cache_size;
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int ct_idx;
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ct_idx = get_cacheinfo_idx(this_leaf->type);
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propname = cache_type_info[ct_idx].size_prop;
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cache_size = of_get_property(this_leaf->of_node, propname, NULL);
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if (cache_size)
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this_leaf->size = of_read_number(cache_size, 1);
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}
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/* not cache_line_size() because that's a macro in include/linux/cache.h */
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static void cache_get_line_size(struct cacheinfo *this_leaf)
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{
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const __be32 *line_size;
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int i, lim, ct_idx;
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ct_idx = get_cacheinfo_idx(this_leaf->type);
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lim = ARRAY_SIZE(cache_type_info[ct_idx].line_size_props);
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for (i = 0; i < lim; i++) {
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const char *propname;
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propname = cache_type_info[ct_idx].line_size_props[i];
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line_size = of_get_property(this_leaf->of_node, propname, NULL);
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if (line_size)
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break;
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}
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if (line_size)
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this_leaf->coherency_line_size = of_read_number(line_size, 1);
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}
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static void cache_nr_sets(struct cacheinfo *this_leaf)
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{
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const char *propname;
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const __be32 *nr_sets;
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int ct_idx;
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ct_idx = get_cacheinfo_idx(this_leaf->type);
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propname = cache_type_info[ct_idx].nr_sets_prop;
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nr_sets = of_get_property(this_leaf->of_node, propname, NULL);
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if (nr_sets)
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this_leaf->number_of_sets = of_read_number(nr_sets, 1);
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}
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static void cache_associativity(struct cacheinfo *this_leaf)
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{
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unsigned int line_size = this_leaf->coherency_line_size;
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unsigned int nr_sets = this_leaf->number_of_sets;
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unsigned int size = this_leaf->size;
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/*
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* If the cache is fully associative, there is no need to
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* check the other properties.
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*/
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if (!(nr_sets == 1) && (nr_sets > 0 && size > 0 && line_size > 0))
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this_leaf->ways_of_associativity = (size / nr_sets) / line_size;
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}
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static void cache_of_override_properties(unsigned int cpu)
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{
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int index;
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struct cacheinfo *this_leaf;
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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for (index = 0; index < cache_leaves(cpu); index++) {
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this_leaf = this_cpu_ci->info_list + index;
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cache_size(this_leaf);
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cache_get_line_size(this_leaf);
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cache_nr_sets(this_leaf);
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cache_associativity(this_leaf);
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}
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}
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#else
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static void cache_of_override_properties(unsigned int cpu) { }
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static inline int cache_setup_of_node(unsigned int cpu) { return 0; }
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static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
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struct cacheinfo *sib_leaf)
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{
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/*
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* For non-DT systems, assume unique level 1 cache, system-wide
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* shared caches for all other levels. This will be used only if
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* arch specific code has not populated shared_cpu_map
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*/
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return !(this_leaf->level == 1);
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}
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#endif
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static int cache_shared_cpu_map_setup(unsigned int cpu)
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{
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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struct cacheinfo *this_leaf, *sib_leaf;
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unsigned int index;
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int ret = 0;
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if (this_cpu_ci->cpu_map_populated)
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return 0;
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if (of_have_populated_dt())
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ret = cache_setup_of_node(cpu);
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else if (!acpi_disabled)
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/* No cache property/hierarchy support yet in ACPI */
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ret = -ENOTSUPP;
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if (ret)
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return ret;
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for (index = 0; index < cache_leaves(cpu); index++) {
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unsigned int i;
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this_leaf = this_cpu_ci->info_list + index;
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/* skip if shared_cpu_map is already populated */
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if (!cpumask_empty(&this_leaf->shared_cpu_map))
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continue;
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cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map);
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for_each_online_cpu(i) {
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struct cpu_cacheinfo *sib_cpu_ci = get_cpu_cacheinfo(i);
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if (i == cpu || !sib_cpu_ci->info_list)
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continue;/* skip if itself or no cacheinfo */
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sib_leaf = sib_cpu_ci->info_list + index;
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if (cache_leaves_are_shared(this_leaf, sib_leaf)) {
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cpumask_set_cpu(cpu, &sib_leaf->shared_cpu_map);
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cpumask_set_cpu(i, &this_leaf->shared_cpu_map);
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}
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}
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}
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return 0;
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}
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static void cache_shared_cpu_map_remove(unsigned int cpu)
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{
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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struct cacheinfo *this_leaf, *sib_leaf;
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unsigned int sibling, index;
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for (index = 0; index < cache_leaves(cpu); index++) {
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this_leaf = this_cpu_ci->info_list + index;
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for_each_cpu(sibling, &this_leaf->shared_cpu_map) {
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struct cpu_cacheinfo *sib_cpu_ci;
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if (sibling == cpu) /* skip itself */
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continue;
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sib_cpu_ci = get_cpu_cacheinfo(sibling);
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if (!sib_cpu_ci->info_list)
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continue;
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sib_leaf = sib_cpu_ci->info_list + index;
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cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map);
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cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map);
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}
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of_node_put(this_leaf->of_node);
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}
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}
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static void cache_override_properties(unsigned int cpu)
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{
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if (of_have_populated_dt())
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return cache_of_override_properties(cpu);
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}
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static void free_cache_attributes(unsigned int cpu)
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{
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if (!per_cpu_cacheinfo(cpu))
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return;
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cache_shared_cpu_map_remove(cpu);
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kfree(per_cpu_cacheinfo(cpu));
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per_cpu_cacheinfo(cpu) = NULL;
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}
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int __weak init_cache_level(unsigned int cpu)
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{
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return -ENOENT;
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}
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int __weak populate_cache_leaves(unsigned int cpu)
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{
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return -ENOENT;
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}
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static int detect_cache_attributes(unsigned int cpu)
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{
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int ret;
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if (init_cache_level(cpu) || !cache_leaves(cpu))
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return -ENOENT;
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per_cpu_cacheinfo(cpu) = kcalloc(cache_leaves(cpu),
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sizeof(struct cacheinfo), GFP_KERNEL);
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if (per_cpu_cacheinfo(cpu) == NULL)
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return -ENOMEM;
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ret = populate_cache_leaves(cpu);
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if (ret)
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goto free_ci;
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/*
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* For systems using DT for cache hierarchy, of_node and shared_cpu_map
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* will be set up here only if they are not populated already
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*/
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ret = cache_shared_cpu_map_setup(cpu);
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if (ret) {
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pr_warn("Unable to detect cache hierarchy for CPU %d\n", cpu);
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goto free_ci;
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}
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cache_override_properties(cpu);
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return 0;
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free_ci:
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free_cache_attributes(cpu);
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return ret;
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}
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/* pointer to cpuX/cache device */
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static DEFINE_PER_CPU(struct device *, ci_cache_dev);
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#define per_cpu_cache_dev(cpu) (per_cpu(ci_cache_dev, cpu))
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static cpumask_t cache_dev_map;
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/* pointer to array of devices for cpuX/cache/indexY */
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static DEFINE_PER_CPU(struct device **, ci_index_dev);
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#define per_cpu_index_dev(cpu) (per_cpu(ci_index_dev, cpu))
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#define per_cache_index_dev(cpu, idx) ((per_cpu_index_dev(cpu))[idx])
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#define show_one(file_name, object) \
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static ssize_t file_name##_show(struct device *dev, \
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struct device_attribute *attr, char *buf) \
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{ \
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struct cacheinfo *this_leaf = dev_get_drvdata(dev); \
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return sprintf(buf, "%u\n", this_leaf->object); \
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}
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show_one(id, id);
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show_one(level, level);
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show_one(coherency_line_size, coherency_line_size);
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show_one(number_of_sets, number_of_sets);
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show_one(physical_line_partition, physical_line_partition);
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show_one(ways_of_associativity, ways_of_associativity);
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static ssize_t size_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct cacheinfo *this_leaf = dev_get_drvdata(dev);
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return sprintf(buf, "%uK\n", this_leaf->size >> 10);
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}
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static ssize_t shared_cpumap_show_func(struct device *dev, bool list, char *buf)
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{
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struct cacheinfo *this_leaf = dev_get_drvdata(dev);
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const struct cpumask *mask = &this_leaf->shared_cpu_map;
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return cpumap_print_to_pagebuf(list, buf, mask);
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}
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static ssize_t shared_cpu_map_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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return shared_cpumap_show_func(dev, false, buf);
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}
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static ssize_t shared_cpu_list_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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return shared_cpumap_show_func(dev, true, buf);
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}
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static ssize_t type_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct cacheinfo *this_leaf = dev_get_drvdata(dev);
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switch (this_leaf->type) {
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case CACHE_TYPE_DATA:
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return sprintf(buf, "Data\n");
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case CACHE_TYPE_INST:
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return sprintf(buf, "Instruction\n");
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case CACHE_TYPE_UNIFIED:
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return sprintf(buf, "Unified\n");
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default:
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return -EINVAL;
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}
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}
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static ssize_t allocation_policy_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct cacheinfo *this_leaf = dev_get_drvdata(dev);
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unsigned int ci_attr = this_leaf->attributes;
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int n = 0;
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if ((ci_attr & CACHE_READ_ALLOCATE) && (ci_attr & CACHE_WRITE_ALLOCATE))
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n = sprintf(buf, "ReadWriteAllocate\n");
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else if (ci_attr & CACHE_READ_ALLOCATE)
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n = sprintf(buf, "ReadAllocate\n");
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else if (ci_attr & CACHE_WRITE_ALLOCATE)
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n = sprintf(buf, "WriteAllocate\n");
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return n;
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}
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static ssize_t write_policy_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct cacheinfo *this_leaf = dev_get_drvdata(dev);
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unsigned int ci_attr = this_leaf->attributes;
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int n = 0;
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if (ci_attr & CACHE_WRITE_THROUGH)
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n = sprintf(buf, "WriteThrough\n");
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else if (ci_attr & CACHE_WRITE_BACK)
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n = sprintf(buf, "WriteBack\n");
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return n;
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}
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static DEVICE_ATTR_RO(id);
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static DEVICE_ATTR_RO(level);
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static DEVICE_ATTR_RO(type);
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static DEVICE_ATTR_RO(coherency_line_size);
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static DEVICE_ATTR_RO(ways_of_associativity);
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static DEVICE_ATTR_RO(number_of_sets);
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|
static DEVICE_ATTR_RO(size);
|
|
static DEVICE_ATTR_RO(allocation_policy);
|
|
static DEVICE_ATTR_RO(write_policy);
|
|
static DEVICE_ATTR_RO(shared_cpu_map);
|
|
static DEVICE_ATTR_RO(shared_cpu_list);
|
|
static DEVICE_ATTR_RO(physical_line_partition);
|
|
|
|
static struct attribute *cache_default_attrs[] = {
|
|
&dev_attr_id.attr,
|
|
&dev_attr_type.attr,
|
|
&dev_attr_level.attr,
|
|
&dev_attr_shared_cpu_map.attr,
|
|
&dev_attr_shared_cpu_list.attr,
|
|
&dev_attr_coherency_line_size.attr,
|
|
&dev_attr_ways_of_associativity.attr,
|
|
&dev_attr_number_of_sets.attr,
|
|
&dev_attr_size.attr,
|
|
&dev_attr_allocation_policy.attr,
|
|
&dev_attr_write_policy.attr,
|
|
&dev_attr_physical_line_partition.attr,
|
|
NULL
|
|
};
|
|
|
|
static umode_t
|
|
cache_default_attrs_is_visible(struct kobject *kobj,
|
|
struct attribute *attr, int unused)
|
|
{
|
|
struct device *dev = kobj_to_dev(kobj);
|
|
struct cacheinfo *this_leaf = dev_get_drvdata(dev);
|
|
const struct cpumask *mask = &this_leaf->shared_cpu_map;
|
|
umode_t mode = attr->mode;
|
|
|
|
if ((attr == &dev_attr_id.attr) && (this_leaf->attributes & CACHE_ID))
|
|
return mode;
|
|
if ((attr == &dev_attr_type.attr) && this_leaf->type)
|
|
return mode;
|
|
if ((attr == &dev_attr_level.attr) && this_leaf->level)
|
|
return mode;
|
|
if ((attr == &dev_attr_shared_cpu_map.attr) && !cpumask_empty(mask))
|
|
return mode;
|
|
if ((attr == &dev_attr_shared_cpu_list.attr) && !cpumask_empty(mask))
|
|
return mode;
|
|
if ((attr == &dev_attr_coherency_line_size.attr) &&
|
|
this_leaf->coherency_line_size)
|
|
return mode;
|
|
if ((attr == &dev_attr_ways_of_associativity.attr) &&
|
|
this_leaf->size) /* allow 0 = full associativity */
|
|
return mode;
|
|
if ((attr == &dev_attr_number_of_sets.attr) &&
|
|
this_leaf->number_of_sets)
|
|
return mode;
|
|
if ((attr == &dev_attr_size.attr) && this_leaf->size)
|
|
return mode;
|
|
if ((attr == &dev_attr_write_policy.attr) &&
|
|
(this_leaf->attributes & CACHE_WRITE_POLICY_MASK))
|
|
return mode;
|
|
if ((attr == &dev_attr_allocation_policy.attr) &&
|
|
(this_leaf->attributes & CACHE_ALLOCATE_POLICY_MASK))
|
|
return mode;
|
|
if ((attr == &dev_attr_physical_line_partition.attr) &&
|
|
this_leaf->physical_line_partition)
|
|
return mode;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct attribute_group cache_default_group = {
|
|
.attrs = cache_default_attrs,
|
|
.is_visible = cache_default_attrs_is_visible,
|
|
};
|
|
|
|
static const struct attribute_group *cache_default_groups[] = {
|
|
&cache_default_group,
|
|
NULL,
|
|
};
|
|
|
|
static const struct attribute_group *cache_private_groups[] = {
|
|
&cache_default_group,
|
|
NULL, /* Place holder for private group */
|
|
NULL,
|
|
};
|
|
|
|
const struct attribute_group *
|
|
__weak cache_get_priv_group(struct cacheinfo *this_leaf)
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
static const struct attribute_group **
|
|
cache_get_attribute_groups(struct cacheinfo *this_leaf)
|
|
{
|
|
const struct attribute_group *priv_group =
|
|
cache_get_priv_group(this_leaf);
|
|
|
|
if (!priv_group)
|
|
return cache_default_groups;
|
|
|
|
if (!cache_private_groups[1])
|
|
cache_private_groups[1] = priv_group;
|
|
|
|
return cache_private_groups;
|
|
}
|
|
|
|
/* Add/Remove cache interface for CPU device */
|
|
static void cpu_cache_sysfs_exit(unsigned int cpu)
|
|
{
|
|
int i;
|
|
struct device *ci_dev;
|
|
|
|
if (per_cpu_index_dev(cpu)) {
|
|
for (i = 0; i < cache_leaves(cpu); i++) {
|
|
ci_dev = per_cache_index_dev(cpu, i);
|
|
if (!ci_dev)
|
|
continue;
|
|
device_unregister(ci_dev);
|
|
}
|
|
kfree(per_cpu_index_dev(cpu));
|
|
per_cpu_index_dev(cpu) = NULL;
|
|
}
|
|
device_unregister(per_cpu_cache_dev(cpu));
|
|
per_cpu_cache_dev(cpu) = NULL;
|
|
}
|
|
|
|
static int cpu_cache_sysfs_init(unsigned int cpu)
|
|
{
|
|
struct device *dev = get_cpu_device(cpu);
|
|
|
|
if (per_cpu_cacheinfo(cpu) == NULL)
|
|
return -ENOENT;
|
|
|
|
per_cpu_cache_dev(cpu) = cpu_device_create(dev, NULL, NULL, "cache");
|
|
if (IS_ERR(per_cpu_cache_dev(cpu)))
|
|
return PTR_ERR(per_cpu_cache_dev(cpu));
|
|
|
|
/* Allocate all required memory */
|
|
per_cpu_index_dev(cpu) = kcalloc(cache_leaves(cpu),
|
|
sizeof(struct device *), GFP_KERNEL);
|
|
if (unlikely(per_cpu_index_dev(cpu) == NULL))
|
|
goto err_out;
|
|
|
|
return 0;
|
|
|
|
err_out:
|
|
cpu_cache_sysfs_exit(cpu);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
static int cache_add_dev(unsigned int cpu)
|
|
{
|
|
unsigned int i;
|
|
int rc;
|
|
struct device *ci_dev, *parent;
|
|
struct cacheinfo *this_leaf;
|
|
struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
|
|
const struct attribute_group **cache_groups;
|
|
|
|
rc = cpu_cache_sysfs_init(cpu);
|
|
if (unlikely(rc < 0))
|
|
return rc;
|
|
|
|
parent = per_cpu_cache_dev(cpu);
|
|
for (i = 0; i < cache_leaves(cpu); i++) {
|
|
this_leaf = this_cpu_ci->info_list + i;
|
|
if (this_leaf->disable_sysfs)
|
|
continue;
|
|
cache_groups = cache_get_attribute_groups(this_leaf);
|
|
ci_dev = cpu_device_create(parent, this_leaf, cache_groups,
|
|
"index%1u", i);
|
|
if (IS_ERR(ci_dev)) {
|
|
rc = PTR_ERR(ci_dev);
|
|
goto err;
|
|
}
|
|
per_cache_index_dev(cpu, i) = ci_dev;
|
|
}
|
|
cpumask_set_cpu(cpu, &cache_dev_map);
|
|
|
|
return 0;
|
|
err:
|
|
cpu_cache_sysfs_exit(cpu);
|
|
return rc;
|
|
}
|
|
|
|
static int cacheinfo_cpu_online(unsigned int cpu)
|
|
{
|
|
int rc = detect_cache_attributes(cpu);
|
|
|
|
if (rc)
|
|
return rc;
|
|
rc = cache_add_dev(cpu);
|
|
if (rc)
|
|
free_cache_attributes(cpu);
|
|
return rc;
|
|
}
|
|
|
|
static int cacheinfo_cpu_pre_down(unsigned int cpu)
|
|
{
|
|
if (cpumask_test_and_clear_cpu(cpu, &cache_dev_map))
|
|
cpu_cache_sysfs_exit(cpu);
|
|
|
|
free_cache_attributes(cpu);
|
|
return 0;
|
|
}
|
|
|
|
static int __init cacheinfo_sysfs_init(void)
|
|
{
|
|
return cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "base/cacheinfo:online",
|
|
cacheinfo_cpu_online, cacheinfo_cpu_pre_down);
|
|
}
|
|
device_initcall(cacheinfo_sysfs_init);
|