Chen-Yu Tsai 6f86341726 clk: sunxi: Allwinner A20 output clock support ... This patch adds support for the external clock outputs on the Allwinner A20 SoC. The clock outputs are similar to "module 0" type clocks, with different offsets and widths for clock factors. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Emilio López <emilio@elopez.com.ar>		2013-12-28 17:14:21 -03:00
..
Makefile	clk: arm: sunxi: Add a new clock driver for sunxi SOCs	2013-03-27 08:35:34 -07:00
clk-factors.c	clk: sunxi: register factors clocks behind composite	2013-12-28 17:07:42 -03:00
clk-factors.h	clk: sunxi: register factors clocks behind composite	2013-12-28 17:07:42 -03:00
clk-sunxi.c	clk: sunxi: Allwinner A20 output clock support	2013-12-28 17:14:21 -03:00