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![Antonino A. Daplas](/assets/img/avatar_default.png)
The pseudo_palette is only 16 elements long. Signed-off-by: Antonino Daplas <adaplas@gmail.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
1092 lines
27 KiB
C
1092 lines
27 KiB
C
/*
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* controlfb.c -- frame buffer device for the PowerMac 'control' display
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*
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* Created 12 July 1998 by Dan Jacobowitz <dan@debian.org>
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* Copyright (C) 1998 Dan Jacobowitz
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* Copyright (C) 2001 Takashi Oe
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*
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* Mmap code by Michel Lanners <mlan@cpu.lu>
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*
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* Frame buffer structure from:
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* drivers/video/chipsfb.c -- frame buffer device for
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* Chips & Technologies 65550 chip.
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*
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* Copyright (C) 1998 Paul Mackerras
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*
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* This file is derived from the Powermac "chips" driver:
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* Copyright (C) 1997 Fabio Riccardi.
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* And from the frame buffer device for Open Firmware-initialized devices:
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* Copyright (C) 1997 Geert Uytterhoeven.
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*
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* Hardware information from:
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* control.c: Console support for PowerMac "control" display adaptor.
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* Copyright (C) 1996 Paul Mackerras
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*
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* Updated to 2.5 framebuffer API by Ben Herrenschmidt
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* <benh@kernel.crashing.org>, Paul Mackerras <paulus@samba.org>,
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* and James Simmons <jsimmons@infradead.org>.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive for
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* more details.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/vmalloc.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/fb.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/nvram.h>
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#include <linux/adb.h>
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#include <linux/cuda.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/pgtable.h>
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#include <asm/btext.h>
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#include "macmodes.h"
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#include "controlfb.h"
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struct fb_par_control {
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int vmode, cmode;
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int xres, yres;
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int vxres, vyres;
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int xoffset, yoffset;
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int pitch;
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struct control_regvals regvals;
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unsigned long sync;
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unsigned char ctrl;
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};
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#define DIRTY(z) ((x)->z != (y)->z)
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#define DIRTY_CMAP(z) (memcmp(&((x)->z), &((y)->z), sizeof((y)->z)))
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static inline int PAR_EQUAL(struct fb_par_control *x, struct fb_par_control *y)
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{
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int i, results;
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results = 1;
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for (i = 0; i < 3; i++)
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results &= !DIRTY(regvals.clock_params[i]);
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if (!results)
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return 0;
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for (i = 0; i < 16; i++)
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results &= !DIRTY(regvals.regs[i]);
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if (!results)
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return 0;
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return (!DIRTY(cmode) && !DIRTY(xres) && !DIRTY(yres)
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&& !DIRTY(vxres) && !DIRTY(vyres));
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}
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static inline int VAR_MATCH(struct fb_var_screeninfo *x, struct fb_var_screeninfo *y)
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{
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return (!DIRTY(bits_per_pixel) && !DIRTY(xres)
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&& !DIRTY(yres) && !DIRTY(xres_virtual)
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&& !DIRTY(yres_virtual)
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&& !DIRTY_CMAP(red) && !DIRTY_CMAP(green) && !DIRTY_CMAP(blue));
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}
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struct fb_info_control {
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struct fb_info info;
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struct fb_par_control par;
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u32 pseudo_palette[16];
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struct cmap_regs __iomem *cmap_regs;
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unsigned long cmap_regs_phys;
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struct control_regs __iomem *control_regs;
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unsigned long control_regs_phys;
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unsigned long control_regs_size;
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__u8 __iomem *frame_buffer;
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unsigned long frame_buffer_phys;
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unsigned long fb_orig_base;
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unsigned long fb_orig_size;
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int control_use_bank2;
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unsigned long total_vram;
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unsigned char vram_attr;
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};
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/* control register access macro */
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#define CNTRL_REG(INFO,REG) (&(((INFO)->control_regs->REG).r))
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/******************** Prototypes for exported functions ********************/
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/*
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* struct fb_ops
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*/
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static int controlfb_pan_display(struct fb_var_screeninfo *var,
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struct fb_info *info);
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static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
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u_int transp, struct fb_info *info);
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static int controlfb_blank(int blank_mode, struct fb_info *info);
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static int controlfb_mmap(struct fb_info *info,
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struct vm_area_struct *vma);
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static int controlfb_set_par (struct fb_info *info);
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static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info);
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/******************** Prototypes for internal functions **********************/
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static void set_control_clock(unsigned char *params);
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static int init_control(struct fb_info_control *p);
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static void control_set_hardware(struct fb_info_control *p,
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struct fb_par_control *par);
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static int control_of_init(struct device_node *dp);
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static void find_vram_size(struct fb_info_control *p);
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static int read_control_sense(struct fb_info_control *p);
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static int calc_clock_params(unsigned long clk, unsigned char *param);
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static int control_var_to_par(struct fb_var_screeninfo *var,
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struct fb_par_control *par, const struct fb_info *fb_info);
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static inline void control_par_to_var(struct fb_par_control *par,
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struct fb_var_screeninfo *var);
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static void control_init_info(struct fb_info *info, struct fb_info_control *p);
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static void control_cleanup(void);
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/************************** Internal variables *******************************/
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static struct fb_info_control *control_fb;
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static int default_vmode __initdata = VMODE_NVRAM;
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static int default_cmode __initdata = CMODE_NVRAM;
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static struct fb_ops controlfb_ops = {
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.owner = THIS_MODULE,
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.fb_check_var = controlfb_check_var,
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.fb_set_par = controlfb_set_par,
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.fb_setcolreg = controlfb_setcolreg,
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.fb_pan_display = controlfb_pan_display,
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.fb_blank = controlfb_blank,
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.fb_mmap = controlfb_mmap,
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.fb_fillrect = cfb_fillrect,
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.fb_copyarea = cfb_copyarea,
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.fb_imageblit = cfb_imageblit,
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};
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/******************** The functions for controlfb_ops ********************/
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#ifdef MODULE
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MODULE_LICENSE("GPL");
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int init_module(void)
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{
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struct device_node *dp;
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int ret = -ENXIO;
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dp = of_find_node_by_name(NULL, "control");
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if (dp != 0 && !control_of_init(dp))
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ret = 0;
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of_node_put(dp);
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return ret;
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}
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void cleanup_module(void)
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{
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control_cleanup();
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}
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#endif
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/*
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* Checks a var structure
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*/
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static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info)
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{
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struct fb_par_control par;
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int err;
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err = control_var_to_par(var, &par, info);
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if (err)
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return err;
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control_par_to_var(&par, var);
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return 0;
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}
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/*
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* Applies current var to display
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*/
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static int controlfb_set_par (struct fb_info *info)
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{
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struct fb_info_control *p = (struct fb_info_control *) info;
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struct fb_par_control par;
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int err;
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if((err = control_var_to_par(&info->var, &par, info))) {
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printk (KERN_ERR "controlfb_set_par: error calling"
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" control_var_to_par: %d.\n", err);
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return err;
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}
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control_set_hardware(p, &par);
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info->fix.visual = (p->par.cmode == CMODE_8) ?
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FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR;
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info->fix.line_length = p->par.pitch;
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info->fix.xpanstep = 32 >> p->par.cmode;
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info->fix.ypanstep = 1;
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return 0;
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}
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/*
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* Set screen start address according to var offset values
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*/
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static inline void set_screen_start(int xoffset, int yoffset,
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struct fb_info_control *p)
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{
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struct fb_par_control *par = &p->par;
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par->xoffset = xoffset;
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par->yoffset = yoffset;
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out_le32(CNTRL_REG(p,start_addr),
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par->yoffset * par->pitch + (par->xoffset << par->cmode));
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}
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static int controlfb_pan_display(struct fb_var_screeninfo *var,
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struct fb_info *info)
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{
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unsigned int xoffset, hstep;
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struct fb_info_control *p = (struct fb_info_control *)info;
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struct fb_par_control *par = &p->par;
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/*
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* make sure start addr will be 32-byte aligned
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*/
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hstep = 0x1f >> par->cmode;
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xoffset = (var->xoffset + hstep) & ~hstep;
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if (xoffset+par->xres > par->vxres ||
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var->yoffset+par->yres > par->vyres)
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return -EINVAL;
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set_screen_start(xoffset, var->yoffset, p);
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return 0;
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}
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/*
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* Private mmap since we want to have a different caching on the framebuffer
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* for controlfb.
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* Note there's no locking in here; it's done in fb_mmap() in fbmem.c.
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*/
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static int controlfb_mmap(struct fb_info *info,
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struct vm_area_struct *vma)
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{
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unsigned long off, start;
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u32 len;
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off = vma->vm_pgoff << PAGE_SHIFT;
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/* frame buffer memory */
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start = info->fix.smem_start;
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len = PAGE_ALIGN((start & ~PAGE_MASK)+info->fix.smem_len);
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if (off >= len) {
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/* memory mapped io */
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off -= len;
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if (info->var.accel_flags)
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return -EINVAL;
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start = info->fix.mmio_start;
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len = PAGE_ALIGN((start & ~PAGE_MASK)+info->fix.mmio_len);
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pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE|_PAGE_GUARDED;
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} else {
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/* framebuffer */
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pgprot_val(vma->vm_page_prot) |= _PAGE_WRITETHRU;
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}
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start &= PAGE_MASK;
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if ((vma->vm_end - vma->vm_start + off) > len)
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return -EINVAL;
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off += start;
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vma->vm_pgoff = off >> PAGE_SHIFT;
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if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
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vma->vm_end - vma->vm_start, vma->vm_page_prot))
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return -EAGAIN;
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return 0;
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}
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static int controlfb_blank(int blank_mode, struct fb_info *info)
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{
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struct fb_info_control *p = (struct fb_info_control *) info;
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unsigned ctrl;
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ctrl = ld_le32(CNTRL_REG(p,ctrl));
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if (blank_mode > 0)
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switch (blank_mode) {
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case FB_BLANK_VSYNC_SUSPEND:
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ctrl &= ~3;
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break;
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case FB_BLANK_HSYNC_SUSPEND:
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ctrl &= ~0x30;
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break;
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case FB_BLANK_POWERDOWN:
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ctrl &= ~0x33;
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/* fall through */
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case FB_BLANK_NORMAL:
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ctrl |= 0x400;
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break;
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default:
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break;
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}
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else {
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ctrl &= ~0x400;
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ctrl |= 0x33;
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}
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out_le32(CNTRL_REG(p,ctrl), ctrl);
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return 0;
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}
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static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
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u_int transp, struct fb_info *info)
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{
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struct fb_info_control *p = (struct fb_info_control *) info;
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__u8 r, g, b;
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if (regno > 255)
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return 1;
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r = red >> 8;
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g = green >> 8;
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b = blue >> 8;
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out_8(&p->cmap_regs->addr, regno); /* tell clut what addr to fill */
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out_8(&p->cmap_regs->lut, r); /* send one color channel at */
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out_8(&p->cmap_regs->lut, g); /* a time... */
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out_8(&p->cmap_regs->lut, b);
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if (regno < 16) {
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int i;
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switch (p->par.cmode) {
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case CMODE_16:
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p->pseudo_palette[regno] =
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(regno << 10) | (regno << 5) | regno;
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break;
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case CMODE_32:
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i = (regno << 8) | regno;
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p->pseudo_palette[regno] = (i << 16) | i;
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break;
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}
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}
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return 0;
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}
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/******************** End of controlfb_ops implementation ******************/
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static void set_control_clock(unsigned char *params)
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{
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#ifdef CONFIG_ADB_CUDA
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struct adb_request req;
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int i;
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for (i = 0; i < 3; ++i) {
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cuda_request(&req, NULL, 5, CUDA_PACKET, CUDA_GET_SET_IIC,
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0x50, i + 1, params[i]);
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while (!req.complete)
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cuda_poll();
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}
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#endif
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}
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/*
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* finish off the driver initialization and register
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*/
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static int __init init_control(struct fb_info_control *p)
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{
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int full, sense, vmode, cmode, vyres;
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struct fb_var_screeninfo var;
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int rc;
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printk(KERN_INFO "controlfb: ");
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full = p->total_vram == 0x400000;
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/* Try to pick a video mode out of NVRAM if we have one. */
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#ifdef CONFIG_NVRAM
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if (default_cmode == CMODE_NVRAM){
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cmode = nvram_read_byte(NV_CMODE);
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if(cmode < CMODE_8 || cmode > CMODE_32)
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cmode = CMODE_8;
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} else
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#endif
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cmode=default_cmode;
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#ifdef CONFIG_NVRAM
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if (default_vmode == VMODE_NVRAM) {
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vmode = nvram_read_byte(NV_VMODE);
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if (vmode < 1 || vmode > VMODE_MAX ||
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control_mac_modes[vmode - 1].m[full] < cmode) {
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sense = read_control_sense(p);
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printk("Monitor sense value = 0x%x, ", sense);
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vmode = mac_map_monitor_sense(sense);
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if (control_mac_modes[vmode - 1].m[full] < cmode)
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vmode = VMODE_640_480_60;
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}
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} else
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#endif
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{
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vmode=default_vmode;
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if (control_mac_modes[vmode - 1].m[full] < cmode) {
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if (cmode > CMODE_8)
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cmode--;
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else
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vmode = VMODE_640_480_60;
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}
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}
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|
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/* Initialize info structure */
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control_init_info(&p->info, p);
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/* Setup default var */
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if (mac_vmode_to_var(vmode, cmode, &var) < 0) {
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/* This shouldn't happen! */
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printk("mac_vmode_to_var(%d, %d,) failed\n", vmode, cmode);
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try_again:
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vmode = VMODE_640_480_60;
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cmode = CMODE_8;
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if (mac_vmode_to_var(vmode, cmode, &var) < 0) {
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printk(KERN_ERR "controlfb: mac_vmode_to_var() failed\n");
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return -ENXIO;
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}
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printk(KERN_INFO "controlfb: ");
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}
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printk("using video mode %d and color mode %d.\n", vmode, cmode);
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vyres = (p->total_vram - CTRLFB_OFF) / (var.xres << cmode);
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if (vyres > var.yres)
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var.yres_virtual = vyres;
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|
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/* Apply default var */
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var.activate = FB_ACTIVATE_NOW;
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rc = fb_set_var(&p->info, &var);
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if (rc && (vmode != VMODE_640_480_60 || cmode != CMODE_8))
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goto try_again;
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|
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/* Register with fbdev layer */
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if (register_framebuffer(&p->info) < 0)
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return -ENXIO;
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|
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printk(KERN_INFO "fb%d: control display adapter\n", p->info.node);
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return 0;
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}
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|
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#define RADACAL_WRITE(a,d) \
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out_8(&p->cmap_regs->addr, (a)); \
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out_8(&p->cmap_regs->dat, (d))
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|
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/* Now how about actually saying, Make it so! */
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/* Some things in here probably don't need to be done each time. */
|
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static void control_set_hardware(struct fb_info_control *p, struct fb_par_control *par)
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{
|
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struct control_regvals *r;
|
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volatile struct preg __iomem *rp;
|
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int i, cmode;
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|
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if (PAR_EQUAL(&p->par, par)) {
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/*
|
|
* check if only xoffset or yoffset differs.
|
|
* this prevents flickers in typical VT switch case.
|
|
*/
|
|
if (p->par.xoffset != par->xoffset ||
|
|
p->par.yoffset != par->yoffset)
|
|
set_screen_start(par->xoffset, par->yoffset, p);
|
|
|
|
return;
|
|
}
|
|
|
|
p->par = *par;
|
|
cmode = p->par.cmode;
|
|
r = &par->regvals;
|
|
|
|
/* Turn off display */
|
|
out_le32(CNTRL_REG(p,ctrl), 0x400 | par->ctrl);
|
|
|
|
set_control_clock(r->clock_params);
|
|
|
|
RADACAL_WRITE(0x20, r->radacal_ctrl);
|
|
RADACAL_WRITE(0x21, p->control_use_bank2 ? 0 : 1);
|
|
RADACAL_WRITE(0x10, 0);
|
|
RADACAL_WRITE(0x11, 0);
|
|
|
|
rp = &p->control_regs->vswin;
|
|
for (i = 0; i < 16; ++i, ++rp)
|
|
out_le32(&rp->r, r->regs[i]);
|
|
|
|
out_le32(CNTRL_REG(p,pitch), par->pitch);
|
|
out_le32(CNTRL_REG(p,mode), r->mode);
|
|
out_le32(CNTRL_REG(p,vram_attr), p->vram_attr);
|
|
out_le32(CNTRL_REG(p,start_addr), par->yoffset * par->pitch
|
|
+ (par->xoffset << cmode));
|
|
out_le32(CNTRL_REG(p,rfrcnt), 0x1e5);
|
|
out_le32(CNTRL_REG(p,intr_ena), 0);
|
|
|
|
/* Turn on display */
|
|
out_le32(CNTRL_REG(p,ctrl), par->ctrl);
|
|
|
|
#ifdef CONFIG_BOOTX_TEXT
|
|
btext_update_display(p->frame_buffer_phys + CTRLFB_OFF,
|
|
p->par.xres, p->par.yres,
|
|
(cmode == CMODE_32? 32: cmode == CMODE_16? 16: 8),
|
|
p->par.pitch);
|
|
#endif /* CONFIG_BOOTX_TEXT */
|
|
}
|
|
|
|
|
|
/*
|
|
* Parse user speficied options (`video=controlfb:')
|
|
*/
|
|
static void __init control_setup(char *options)
|
|
{
|
|
char *this_opt;
|
|
|
|
if (!options || !*options)
|
|
return;
|
|
|
|
while ((this_opt = strsep(&options, ",")) != NULL) {
|
|
if (!strncmp(this_opt, "vmode:", 6)) {
|
|
int vmode = simple_strtoul(this_opt+6, NULL, 0);
|
|
if (vmode > 0 && vmode <= VMODE_MAX &&
|
|
control_mac_modes[vmode - 1].m[1] >= 0)
|
|
default_vmode = vmode;
|
|
} else if (!strncmp(this_opt, "cmode:", 6)) {
|
|
int depth = simple_strtoul(this_opt+6, NULL, 0);
|
|
switch (depth) {
|
|
case CMODE_8:
|
|
case CMODE_16:
|
|
case CMODE_32:
|
|
default_cmode = depth;
|
|
break;
|
|
case 8:
|
|
default_cmode = CMODE_8;
|
|
break;
|
|
case 15:
|
|
case 16:
|
|
default_cmode = CMODE_16;
|
|
break;
|
|
case 24:
|
|
case 32:
|
|
default_cmode = CMODE_32;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
static int __init control_init(void)
|
|
{
|
|
struct device_node *dp;
|
|
char *option = NULL;
|
|
int ret = -ENXIO;
|
|
|
|
if (fb_get_options("controlfb", &option))
|
|
return -ENODEV;
|
|
control_setup(option);
|
|
|
|
dp = of_find_node_by_name(NULL, "control");
|
|
if (dp != 0 && !control_of_init(dp))
|
|
ret = 0;
|
|
of_node_put(dp);
|
|
|
|
return ret;
|
|
}
|
|
|
|
module_init(control_init);
|
|
|
|
/* Work out which banks of VRAM we have installed. */
|
|
/* danj: I guess the card just ignores writes to nonexistant VRAM... */
|
|
|
|
static void __init find_vram_size(struct fb_info_control *p)
|
|
{
|
|
int bank1, bank2;
|
|
|
|
/*
|
|
* Set VRAM in 2MB (bank 1) mode
|
|
* VRAM Bank 2 will be accessible through offset 0x600000 if present
|
|
* and VRAM Bank 1 will not respond at that offset even if present
|
|
*/
|
|
out_le32(CNTRL_REG(p,vram_attr), 0x31);
|
|
|
|
out_8(&p->frame_buffer[0x600000], 0xb3);
|
|
out_8(&p->frame_buffer[0x600001], 0x71);
|
|
asm volatile("eieio; dcbf 0,%0" : : "r" (&p->frame_buffer[0x600000])
|
|
: "memory" );
|
|
mb();
|
|
asm volatile("eieio; dcbi 0,%0" : : "r" (&p->frame_buffer[0x600000])
|
|
: "memory" );
|
|
mb();
|
|
|
|
bank2 = (in_8(&p->frame_buffer[0x600000]) == 0xb3)
|
|
&& (in_8(&p->frame_buffer[0x600001]) == 0x71);
|
|
|
|
/*
|
|
* Set VRAM in 2MB (bank 2) mode
|
|
* VRAM Bank 1 will be accessible through offset 0x000000 if present
|
|
* and VRAM Bank 2 will not respond at that offset even if present
|
|
*/
|
|
out_le32(CNTRL_REG(p,vram_attr), 0x39);
|
|
|
|
out_8(&p->frame_buffer[0], 0x5a);
|
|
out_8(&p->frame_buffer[1], 0xc7);
|
|
asm volatile("eieio; dcbf 0,%0" : : "r" (&p->frame_buffer[0])
|
|
: "memory" );
|
|
mb();
|
|
asm volatile("eieio; dcbi 0,%0" : : "r" (&p->frame_buffer[0])
|
|
: "memory" );
|
|
mb();
|
|
|
|
bank1 = (in_8(&p->frame_buffer[0]) == 0x5a)
|
|
&& (in_8(&p->frame_buffer[1]) == 0xc7);
|
|
|
|
if (bank2) {
|
|
if (!bank1) {
|
|
/*
|
|
* vram bank 2 only
|
|
*/
|
|
p->control_use_bank2 = 1;
|
|
p->vram_attr = 0x39;
|
|
p->frame_buffer += 0x600000;
|
|
p->frame_buffer_phys += 0x600000;
|
|
} else {
|
|
/*
|
|
* 4 MB vram
|
|
*/
|
|
p->vram_attr = 0x51;
|
|
}
|
|
} else {
|
|
/*
|
|
* vram bank 1 only
|
|
*/
|
|
p->vram_attr = 0x31;
|
|
}
|
|
|
|
p->total_vram = (bank1 + bank2) * 0x200000;
|
|
|
|
printk(KERN_INFO "controlfb: VRAM Total = %dMB "
|
|
"(%dMB @ bank 1, %dMB @ bank 2)\n",
|
|
(bank1 + bank2) << 1, bank1 << 1, bank2 << 1);
|
|
}
|
|
|
|
|
|
/*
|
|
* find "control" and initialize
|
|
*/
|
|
static int __init control_of_init(struct device_node *dp)
|
|
{
|
|
struct fb_info_control *p;
|
|
struct resource fb_res, reg_res;
|
|
|
|
if (control_fb) {
|
|
printk(KERN_ERR "controlfb: only one control is supported\n");
|
|
return -ENXIO;
|
|
}
|
|
|
|
if (of_pci_address_to_resource(dp, 2, &fb_res) ||
|
|
of_pci_address_to_resource(dp, 1, ®_res)) {
|
|
printk(KERN_ERR "can't get 2 addresses for control\n");
|
|
return -ENXIO;
|
|
}
|
|
p = kzalloc(sizeof(*p), GFP_KERNEL);
|
|
if (p == 0)
|
|
return -ENXIO;
|
|
control_fb = p; /* save it for cleanups */
|
|
|
|
/* Map in frame buffer and registers */
|
|
p->fb_orig_base = fb_res.start;
|
|
p->fb_orig_size = fb_res.end - fb_res.start + 1;
|
|
/* use the big-endian aperture (??) */
|
|
p->frame_buffer_phys = fb_res.start + 0x800000;
|
|
p->control_regs_phys = reg_res.start;
|
|
p->control_regs_size = reg_res.end - reg_res.start + 1;
|
|
|
|
if (!p->fb_orig_base ||
|
|
!request_mem_region(p->fb_orig_base,p->fb_orig_size,"controlfb")) {
|
|
p->fb_orig_base = 0;
|
|
goto error_out;
|
|
}
|
|
/* map at most 8MB for the frame buffer */
|
|
p->frame_buffer = __ioremap(p->frame_buffer_phys, 0x800000,
|
|
_PAGE_WRITETHRU);
|
|
|
|
if (!p->control_regs_phys ||
|
|
!request_mem_region(p->control_regs_phys, p->control_regs_size,
|
|
"controlfb regs")) {
|
|
p->control_regs_phys = 0;
|
|
goto error_out;
|
|
}
|
|
p->control_regs = ioremap(p->control_regs_phys, p->control_regs_size);
|
|
|
|
p->cmap_regs_phys = 0xf301b000; /* XXX not in prom? */
|
|
if (!request_mem_region(p->cmap_regs_phys, 0x1000, "controlfb cmap")) {
|
|
p->cmap_regs_phys = 0;
|
|
goto error_out;
|
|
}
|
|
p->cmap_regs = ioremap(p->cmap_regs_phys, 0x1000);
|
|
|
|
if (!p->cmap_regs || !p->control_regs || !p->frame_buffer)
|
|
goto error_out;
|
|
|
|
find_vram_size(p);
|
|
if (!p->total_vram)
|
|
goto error_out;
|
|
|
|
if (init_control(p) < 0)
|
|
goto error_out;
|
|
|
|
return 0;
|
|
|
|
error_out:
|
|
control_cleanup();
|
|
return -ENXIO;
|
|
}
|
|
|
|
/*
|
|
* Get the monitor sense value.
|
|
* Note that this can be called before calibrate_delay,
|
|
* so we can't use udelay.
|
|
*/
|
|
static int read_control_sense(struct fb_info_control *p)
|
|
{
|
|
int sense;
|
|
|
|
out_le32(CNTRL_REG(p,mon_sense), 7); /* drive all lines high */
|
|
__delay(200);
|
|
out_le32(CNTRL_REG(p,mon_sense), 077); /* turn off drivers */
|
|
__delay(2000);
|
|
sense = (in_le32(CNTRL_REG(p,mon_sense)) & 0x1c0) << 2;
|
|
|
|
/* drive each sense line low in turn and collect the other 2 */
|
|
out_le32(CNTRL_REG(p,mon_sense), 033); /* drive A low */
|
|
__delay(2000);
|
|
sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0xc0) >> 2;
|
|
out_le32(CNTRL_REG(p,mon_sense), 055); /* drive B low */
|
|
__delay(2000);
|
|
sense |= ((in_le32(CNTRL_REG(p,mon_sense)) & 0x100) >> 5)
|
|
| ((in_le32(CNTRL_REG(p,mon_sense)) & 0x40) >> 4);
|
|
out_le32(CNTRL_REG(p,mon_sense), 066); /* drive C low */
|
|
__delay(2000);
|
|
sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0x180) >> 7;
|
|
|
|
out_le32(CNTRL_REG(p,mon_sense), 077); /* turn off drivers */
|
|
|
|
return sense;
|
|
}
|
|
|
|
/********************** Various translation functions **********************/
|
|
|
|
#define CONTROL_PIXCLOCK_BASE 256016
|
|
#define CONTROL_PIXCLOCK_MIN 5000 /* ~ 200 MHz dot clock */
|
|
|
|
/*
|
|
* calculate the clock paramaters to be sent to CUDA according to given
|
|
* pixclock in pico second.
|
|
*/
|
|
static int calc_clock_params(unsigned long clk, unsigned char *param)
|
|
{
|
|
unsigned long p0, p1, p2, k, l, m, n, min;
|
|
|
|
if (clk > (CONTROL_PIXCLOCK_BASE << 3))
|
|
return 1;
|
|
|
|
p2 = ((clk << 4) < CONTROL_PIXCLOCK_BASE)? 3: 2;
|
|
l = clk << p2;
|
|
p0 = 0;
|
|
p1 = 0;
|
|
for (k = 1, min = l; k < 32; k++) {
|
|
unsigned long rem;
|
|
|
|
m = CONTROL_PIXCLOCK_BASE * k;
|
|
n = m / l;
|
|
rem = m % l;
|
|
if (n && (n < 128) && rem < min) {
|
|
p0 = k;
|
|
p1 = n;
|
|
min = rem;
|
|
}
|
|
}
|
|
if (!p0 || !p1)
|
|
return 1;
|
|
|
|
param[0] = p0;
|
|
param[1] = p1;
|
|
param[2] = p2;
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
/*
|
|
* This routine takes a user-supplied var, and picks the best vmode/cmode
|
|
* from it.
|
|
*/
|
|
|
|
static int control_var_to_par(struct fb_var_screeninfo *var,
|
|
struct fb_par_control *par, const struct fb_info *fb_info)
|
|
{
|
|
int cmode, piped_diff, hstep;
|
|
unsigned hperiod, hssync, hsblank, hesync, heblank, piped, heq, hlfln,
|
|
hserr, vperiod, vssync, vesync, veblank, vsblank, vswin, vewin;
|
|
unsigned long pixclock;
|
|
struct fb_info_control *p = (struct fb_info_control *) fb_info;
|
|
struct control_regvals *r = &par->regvals;
|
|
|
|
switch (var->bits_per_pixel) {
|
|
case 8:
|
|
par->cmode = CMODE_8;
|
|
if (p->total_vram > 0x200000) {
|
|
r->mode = 3;
|
|
r->radacal_ctrl = 0x20;
|
|
piped_diff = 13;
|
|
} else {
|
|
r->mode = 2;
|
|
r->radacal_ctrl = 0x10;
|
|
piped_diff = 9;
|
|
}
|
|
break;
|
|
case 15:
|
|
case 16:
|
|
par->cmode = CMODE_16;
|
|
if (p->total_vram > 0x200000) {
|
|
r->mode = 2;
|
|
r->radacal_ctrl = 0x24;
|
|
piped_diff = 5;
|
|
} else {
|
|
r->mode = 1;
|
|
r->radacal_ctrl = 0x14;
|
|
piped_diff = 3;
|
|
}
|
|
break;
|
|
case 32:
|
|
par->cmode = CMODE_32;
|
|
if (p->total_vram > 0x200000) {
|
|
r->mode = 1;
|
|
r->radacal_ctrl = 0x28;
|
|
} else {
|
|
r->mode = 0;
|
|
r->radacal_ctrl = 0x18;
|
|
}
|
|
piped_diff = 1;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
/*
|
|
* adjust xres and vxres so that the corresponding memory widths are
|
|
* 32-byte aligned
|
|
*/
|
|
hstep = 31 >> par->cmode;
|
|
par->xres = (var->xres + hstep) & ~hstep;
|
|
par->vxres = (var->xres_virtual + hstep) & ~hstep;
|
|
par->xoffset = (var->xoffset + hstep) & ~hstep;
|
|
if (par->vxres < par->xres)
|
|
par->vxres = par->xres;
|
|
par->pitch = par->vxres << par->cmode;
|
|
|
|
par->yres = var->yres;
|
|
par->vyres = var->yres_virtual;
|
|
par->yoffset = var->yoffset;
|
|
if (par->vyres < par->yres)
|
|
par->vyres = par->yres;
|
|
|
|
par->sync = var->sync;
|
|
|
|
if (par->pitch * par->vyres + CTRLFB_OFF > p->total_vram)
|
|
return -EINVAL;
|
|
|
|
if (par->xoffset + par->xres > par->vxres)
|
|
par->xoffset = par->vxres - par->xres;
|
|
if (par->yoffset + par->yres > par->vyres)
|
|
par->yoffset = par->vyres - par->yres;
|
|
|
|
pixclock = (var->pixclock < CONTROL_PIXCLOCK_MIN)? CONTROL_PIXCLOCK_MIN:
|
|
var->pixclock;
|
|
if (calc_clock_params(pixclock, r->clock_params))
|
|
return -EINVAL;
|
|
|
|
hperiod = ((var->left_margin + par->xres + var->right_margin
|
|
+ var->hsync_len) >> 1) - 2;
|
|
hssync = hperiod + 1;
|
|
hsblank = hssync - (var->right_margin >> 1);
|
|
hesync = (var->hsync_len >> 1) - 1;
|
|
heblank = (var->left_margin >> 1) + hesync;
|
|
piped = heblank - piped_diff;
|
|
heq = var->hsync_len >> 2;
|
|
hlfln = (hperiod+2) >> 1;
|
|
hserr = hssync-hesync;
|
|
vperiod = (var->vsync_len + var->lower_margin + par->yres
|
|
+ var->upper_margin) << 1;
|
|
vssync = vperiod - 2;
|
|
vesync = (var->vsync_len << 1) - vperiod + vssync;
|
|
veblank = (var->upper_margin << 1) + vesync;
|
|
vsblank = vssync - (var->lower_margin << 1);
|
|
vswin = (vsblank+vssync) >> 1;
|
|
vewin = (vesync+veblank) >> 1;
|
|
|
|
r->regs[0] = vswin;
|
|
r->regs[1] = vsblank;
|
|
r->regs[2] = veblank;
|
|
r->regs[3] = vewin;
|
|
r->regs[4] = vesync;
|
|
r->regs[5] = vssync;
|
|
r->regs[6] = vperiod;
|
|
r->regs[7] = piped;
|
|
r->regs[8] = hperiod;
|
|
r->regs[9] = hsblank;
|
|
r->regs[10] = heblank;
|
|
r->regs[11] = hesync;
|
|
r->regs[12] = hssync;
|
|
r->regs[13] = heq;
|
|
r->regs[14] = hlfln;
|
|
r->regs[15] = hserr;
|
|
|
|
if (par->xres >= 1280 && par->cmode >= CMODE_16)
|
|
par->ctrl = 0x7f;
|
|
else
|
|
par->ctrl = 0x3b;
|
|
|
|
if (mac_var_to_vmode(var, &par->vmode, &cmode))
|
|
par->vmode = 0;
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
/*
|
|
* Convert hardware data in par to an fb_var_screeninfo
|
|
*/
|
|
|
|
static void control_par_to_var(struct fb_par_control *par, struct fb_var_screeninfo *var)
|
|
{
|
|
struct control_regints *rv;
|
|
|
|
rv = (struct control_regints *) par->regvals.regs;
|
|
|
|
memset(var, 0, sizeof(*var));
|
|
var->xres = par->xres;
|
|
var->yres = par->yres;
|
|
var->xres_virtual = par->vxres;
|
|
var->yres_virtual = par->vyres;
|
|
var->xoffset = par->xoffset;
|
|
var->yoffset = par->yoffset;
|
|
|
|
switch(par->cmode) {
|
|
default:
|
|
case CMODE_8:
|
|
var->bits_per_pixel = 8;
|
|
var->red.length = 8;
|
|
var->green.length = 8;
|
|
var->blue.length = 8;
|
|
break;
|
|
case CMODE_16: /* RGB 555 */
|
|
var->bits_per_pixel = 16;
|
|
var->red.offset = 10;
|
|
var->red.length = 5;
|
|
var->green.offset = 5;
|
|
var->green.length = 5;
|
|
var->blue.length = 5;
|
|
break;
|
|
case CMODE_32: /* RGB 888 */
|
|
var->bits_per_pixel = 32;
|
|
var->red.offset = 16;
|
|
var->red.length = 8;
|
|
var->green.offset = 8;
|
|
var->green.length = 8;
|
|
var->blue.length = 8;
|
|
var->transp.offset = 24;
|
|
var->transp.length = 8;
|
|
break;
|
|
}
|
|
var->height = -1;
|
|
var->width = -1;
|
|
var->vmode = FB_VMODE_NONINTERLACED;
|
|
|
|
var->left_margin = (rv->heblank - rv->hesync) << 1;
|
|
var->right_margin = (rv->hssync - rv->hsblank) << 1;
|
|
var->hsync_len = (rv->hperiod + 2 - rv->hssync + rv->hesync) << 1;
|
|
|
|
var->upper_margin = (rv->veblank - rv->vesync) >> 1;
|
|
var->lower_margin = (rv->vssync - rv->vsblank) >> 1;
|
|
var->vsync_len = (rv->vperiod - rv->vssync + rv->vesync) >> 1;
|
|
|
|
var->sync = par->sync;
|
|
|
|
/*
|
|
* 10^12 * clock_params[0] / (3906400 * clock_params[1]
|
|
* * 2^clock_params[2])
|
|
* (10^12 * clock_params[0] / (3906400 * clock_params[1]))
|
|
* >> clock_params[2]
|
|
*/
|
|
/* (255990.17 * clock_params[0] / clock_params[1]) >> clock_params[2] */
|
|
var->pixclock = CONTROL_PIXCLOCK_BASE * par->regvals.clock_params[0];
|
|
var->pixclock /= par->regvals.clock_params[1];
|
|
var->pixclock >>= par->regvals.clock_params[2];
|
|
}
|
|
|
|
/*
|
|
* Set misc info vars for this driver
|
|
*/
|
|
static void __init control_init_info(struct fb_info *info, struct fb_info_control *p)
|
|
{
|
|
/* Fill fb_info */
|
|
info->par = &p->par;
|
|
info->fbops = &controlfb_ops;
|
|
info->pseudo_palette = p->pseudo_palette;
|
|
info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
|
|
info->screen_base = p->frame_buffer + CTRLFB_OFF;
|
|
|
|
fb_alloc_cmap(&info->cmap, 256, 0);
|
|
|
|
/* Fill fix common fields */
|
|
strcpy(info->fix.id, "control");
|
|
info->fix.mmio_start = p->control_regs_phys;
|
|
info->fix.mmio_len = sizeof(struct control_regs);
|
|
info->fix.type = FB_TYPE_PACKED_PIXELS;
|
|
info->fix.smem_start = p->frame_buffer_phys + CTRLFB_OFF;
|
|
info->fix.smem_len = p->total_vram - CTRLFB_OFF;
|
|
info->fix.ywrapstep = 0;
|
|
info->fix.type_aux = 0;
|
|
info->fix.accel = FB_ACCEL_NONE;
|
|
}
|
|
|
|
|
|
static void control_cleanup(void)
|
|
{
|
|
struct fb_info_control *p = control_fb;
|
|
|
|
if (!p)
|
|
return;
|
|
|
|
if (p->cmap_regs)
|
|
iounmap(p->cmap_regs);
|
|
if (p->control_regs)
|
|
iounmap(p->control_regs);
|
|
if (p->frame_buffer) {
|
|
if (p->control_use_bank2)
|
|
p->frame_buffer -= 0x600000;
|
|
iounmap(p->frame_buffer);
|
|
}
|
|
if (p->cmap_regs_phys)
|
|
release_mem_region(p->cmap_regs_phys, 0x1000);
|
|
if (p->control_regs_phys)
|
|
release_mem_region(p->control_regs_phys, p->control_regs_size);
|
|
if (p->fb_orig_base)
|
|
release_mem_region(p->fb_orig_base, p->fb_orig_size);
|
|
kfree(p);
|
|
}
|
|
|
|
|