Will Deacon db6f41063c arm64: mm: don't treat user cache maintenance faults as writes ... On arm64, cache maintenance faults appear as data aborts with the CM bit set in the ESR. The WnR bit, usually used to distinguish between faulting loads and stores, always reads as 1 and (slightly confusingly) the instructions are treated as reads by the architecture. This patch fixes our fault handling code to treat cache maintenance faults in the same way as loads. Signed-off-by: Will Deacon <will.deacon@arm.com> Cc: <stable@vger.kernel.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>		2013-07-19 15:49:44 +01:00
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boot	arm64: Add initial DTS for APM X-Gene Storm SOC and APM Mustang board	2013-06-20 17:03:59 +01:00
configs	arm64: Enable APM X-Gene SOC family in the defconfig	2013-06-20 17:03:59 +01:00
include	arm64: add '#ifdef CONFIG_COMPAT' for aarch32_break_handler()	2013-07-19 15:49:43 +01:00
kernel	arm64: Only enable local interrupts after the CPU is marked online	2013-07-19 15:49:42 +01:00
kvm	arm64: KVM: Kconfig integration	2013-07-04 14:40:26 +02:00
lib	arm64: Treat the bitops index argument as an 'int'	2013-05-08 10:33:17 +01:00
mm	arm64: mm: don't treat user cache maintenance faults as writes	2013-07-19 15:49:44 +01:00
xen	xen/arm and xen/arm64: implement HYPERVISOR_tmem_op	2013-07-04 11:41:12 +00:00
Kconfig	arm64: KVM: Kconfig integration	2013-07-04 14:40:26 +02:00
Kconfig.debug	arm64: Kconfig.debug: Remove unused CONFIG_DEBUG_ERRORS	2013-03-19 16:19:19 +00:00
Makefile	arm64/Makefile: provide vdso_install target	2013-06-19 17:54:06 +01:00