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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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db865ee447
- Support for Xilinx Versal platform clks - Display clk controller on qcom sc7180 - Video clk controller on qcom sc7180 - Graphics clk controller on qcom sc7180 - CPU PLLs for qcom msm8916 - Fixes for clk controllers on qcom msm8998 SoCs - Move qcom msm8974 gfx3d clk to RPM control - Display port clk support on qcom sdm845 SoCs - Global clk controller on qcom ipq6018 - Adjust composite clk to new way of describing clk parents - Add a driver for BCLK of Freescale SAI cores * clk-imx: (32 commits) clk: imx: Add support for i.MX8MP clock driver dt-bindings: imx: Add clock binding doc for i.MX8MP clk: imx: gate4: Switch imx_clk_gate4_flags() to clk_hw based API clk: imx: imx8mq: Switch to clk_hw based API clk: imx: imx8mm: Switch to clk_hw based API clk: imx: imx8mn: Switch to clk_hw based API clk: imx: Remove __init for imx_obtain_fixed_clk_hw() API clk: imx: gate3: Switch to clk_hw based API clk: imx: add hw API imx_clk_hw_mux2_flags clk: imx: add imx_unregister_hw_clocks clk: imx: clk-composite-8m: Switch to clk_hw based API clk: imx: clk-pll14xx: Switch to clk_hw based API clk: imx7up: Rename the clks to hws clk: imx: Rename the imx_clk_divider_gate to imply it's clk_hw based clk: imx: Rename the imx_clk_pfdv2 to imply it's clk_hw based clk: imx: Rename the imx_clk_pllv4 to imply it's clk_hw based clk: imx: Rename sccg and frac pll register to suggest clk_hw clk: imx: imx7ulp composite: Rename to show is clk_hw based clk: imx: pllv2: Switch to clk_hw based API clk: imx: pllv1: Switch to clk_hw based API ... * clk-ti: clk: ti: clkctrl: Fix hidden dependency to node name clk: ti: add clkctrl data dra7 sgx clk: ti: omap5: Add missing AESS clock clk: ti: dra7: fix parent for gmac_clkctrl clk: ti: dra7: add vpe clkctrl data clk: ti: dra7: add cam clkctrl data dt-bindings: clock: Move ti-dra7-atl.h to dt-bindings/clock * clk-xilinx: clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag clk: zynqmp: Fix divider calculation clk: zynqmp: Add support for get max divider clk: zynqmp: Warn user if clock user are more than allowed clk: zynqmp: Extend driver for versal dt-bindings: clock: Add bindings for versal clock driver * clk-nvidia: clk: tegra20/30: Explicitly set parent clock for Video Decoder clk: tegra20/30: Don't pre-initialize displays parent clock clk: tegra: divider: Check UART's divider enable-bit state on rate's recalculation clk: tegra: clk-dfll: Remove call to pm_runtime_irq_safe() clk: tegra: Mark fuse clock as critical * clk-qcom: (35 commits) clk: qcom: rpmh: Sort OF match table dt-bindings: fix warnings in validation of qcom,gcc.yaml dt-binding: fix compilation error of the example in qcom,gcc.yaml clk: qcom: Add ipq6018 Global Clock Controller support clk: qcom: Add DT bindings for ipq6018 gcc clock controller clk: qcom: gcc-msm8996: Fix parent for CLKREF clocks clk: qcom: rpmh: Add IPA clock for SC7180 clk: qcom: rpmh: skip undefined clocks when registering clk: qcom: Add video clock controller driver for SC7180 dt-bindings: clock: Introduce SC7180 QCOM Video clock bindings dt-bindings: clock: Add YAML schemas for the QCOM VIDEOCC clock bindings clk: qcom: Add graphics clock controller driver for SC7180 dt-bindings: clock: Introduce SC7180 QCOM Graphics clock bindings dt-bindings: clock: Add YAML schemas for the QCOM GPUCC clock bindings clk: qcom: apcs-msm8916: use clk_parent_data to specify the parent clk: qcom: Add display clock controller driver for SC7180 dt-bindings: clock: Introduce QCOM sc7180 display clock bindings dt-bindings: clock: Add YAML schemas for the QCOM DISPCC clock bindings clk: qcom: clk-alpha-pll: Add support for Fabia PLL calibration clk: qcom: alpha-pll: Remove useless read from set rate ... * clk-freescale: clk: fsl-sai: new driver dt-bindings: clock: document the fsl-sai driver clk: composite: add _register_composite_pdata() variants * clk-qoriq: clk: qoriq: add ls1088a hwaccel clocks support clk: ls1028a: Add clock driver for Display output interface dt/bindings: clk: Add YAML schemas for LS1028A Display Clock bindings |
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actions | ||
analogbits | ||
at91 | ||
axis | ||
axs10x | ||
bcm | ||
berlin | ||
davinci | ||
h8300 | ||
hisilicon | ||
imgtec | ||
imx | ||
ingenic | ||
keystone | ||
loongson1 | ||
mediatek | ||
meson | ||
microchip | ||
mmp | ||
mvebu | ||
mxs | ||
nxp | ||
pistachio | ||
pxa | ||
qcom | ||
renesas | ||
rockchip | ||
samsung | ||
sifive | ||
sirf | ||
socfpga | ||
spear | ||
sprd | ||
st | ||
sunxi | ||
sunxi-ng | ||
tegra | ||
ti | ||
uniphier | ||
ux500 | ||
versatile | ||
x86 | ||
zte | ||
zynq | ||
zynqmp | ||
clk-asm9260.c | ||
clk-aspeed.c | ||
clk-aspeed.h | ||
clk-ast2600.c | ||
clk-axi-clkgen.c | ||
clk-axm5516.c | ||
clk-bd718x7.c | ||
clk-bm1880.c | ||
clk-bulk.c | ||
clk-cdce706.c | ||
clk-cdce925.c | ||
clk-clps711x.c | ||
clk-composite.c | ||
clk-conf.c | ||
clk-cs2000-cp.c | ||
clk-devres.c | ||
clk-divider.c | ||
clk-efm32gg.c | ||
clk-fixed-factor.c | ||
clk-fixed-mmio.c | ||
clk-fixed-rate.c | ||
clk-fractional-divider.c | ||
clk-fsl-sai.c | ||
clk-gate.c | ||
clk-gemini.c | ||
clk-gpio.c | ||
clk-hi655x.c | ||
clk-highbank.c | ||
clk-hsdk-pll.c | ||
clk-lochnagar.c | ||
clk-max9485.c | ||
clk-max77686.c | ||
clk-milbeaut.c | ||
clk-moxart.c | ||
clk-multiplier.c | ||
clk-mux.c | ||
clk-nomadik.c | ||
clk-npcm7xx.c | ||
clk-nspire.c | ||
clk-oxnas.c | ||
clk-palmas.c | ||
clk-plldig.c | ||
clk-pwm.c | ||
clk-qoriq.c | ||
clk-rk808.c | ||
clk-s2mps11.c | ||
clk-scmi.c | ||
clk-scpi.c | ||
clk-si514.c | ||
clk-si544.c | ||
clk-si570.c | ||
clk-si5341.c | ||
clk-si5351.c | ||
clk-si5351.h | ||
clk-stm32f4.c | ||
clk-stm32h7.c | ||
clk-stm32mp1.c | ||
clk-tango4.c | ||
clk-twl6040.c | ||
clk-u300.c | ||
clk-versaclock5.c | ||
clk-vt8500.c | ||
clk-wm831x.c | ||
clk-xgene.c | ||
clk.c | ||
clk.h | ||
clkdev.c | ||
Kconfig | ||
Makefile |