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![Paul Burton](/assets/img/avatar_default.png)
MIPS will soon not be a part of Imagination Technologies, and as such many @imgtec.com email addresses will no longer be valid. This patch updates the addresses for those who: - Have 10 or more patches in mainline authored using an @imgtec.com email address, or any patches dated within the past year. - Are still with Imagination but leaving as part of the MIPS business unit, as determined from an internal email address list. - Haven't already updated their email address (ie. JamesH) or expressed a desire to be excluded (ie. Maciej). - Acked v2 or earlier of this patch, which leaves Deng-Cheng, Matt & myself. New addresses are of the form firstname.lastname@mips.com, and all verified against an internal email address list. An entry is added to .mailmap for each person such that get_maintainer.pl will report the new addresses rather than @imgtec.com addresses which will soon be dead. Instances of the affected addresses throughout the tree are then mechanically replaced with the new @mips.com address. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: Deng-Cheng Zhu <dengcheng.zhu@mips.com> Acked-by: Dengcheng Zhu <dengcheng.zhu@mips.com> Cc: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Matt Redfearn <matt.redfearn@mips.com> Acked-by: Matt Redfearn <matt.redfearn@mips.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: trivial@kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
182 lines
4.4 KiB
C
182 lines
4.4 KiB
C
/*
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* Copyright (C) 2014 Imagination Technologies
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* Author: Paul Burton <paul.burton@mips.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/cpu_pm.h>
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#include <linux/cpuidle.h>
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#include <linux/init.h>
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#include <asm/idle.h>
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#include <asm/pm-cps.h>
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/* Enumeration of the various idle states this driver may enter */
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enum cps_idle_state {
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STATE_WAIT = 0, /* MIPS wait instruction, coherent */
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STATE_NC_WAIT, /* MIPS wait instruction, non-coherent */
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STATE_CLOCK_GATED, /* Core clock gated */
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STATE_POWER_GATED, /* Core power gated */
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STATE_COUNT
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};
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static int cps_nc_enter(struct cpuidle_device *dev,
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struct cpuidle_driver *drv, int index)
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{
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enum cps_pm_state pm_state;
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int err;
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/*
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* At least one core must remain powered up & clocked in order for the
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* system to have any hope of functioning.
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*
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* TODO: don't treat core 0 specially, just prevent the final core
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* TODO: remap interrupt affinity temporarily
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*/
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if (cpus_are_siblings(0, dev->cpu) && (index > STATE_NC_WAIT))
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index = STATE_NC_WAIT;
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/* Select the appropriate cps_pm_state */
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switch (index) {
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case STATE_NC_WAIT:
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pm_state = CPS_PM_NC_WAIT;
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break;
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case STATE_CLOCK_GATED:
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pm_state = CPS_PM_CLOCK_GATED;
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break;
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case STATE_POWER_GATED:
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pm_state = CPS_PM_POWER_GATED;
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break;
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default:
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BUG();
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return -EINVAL;
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}
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/* Notify listeners the CPU is about to power down */
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if ((pm_state == CPS_PM_POWER_GATED) && cpu_pm_enter())
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return -EINTR;
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/* Enter that state */
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err = cps_pm_enter_state(pm_state);
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/* Notify listeners the CPU is back up */
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if (pm_state == CPS_PM_POWER_GATED)
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cpu_pm_exit();
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return err ?: index;
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}
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static struct cpuidle_driver cps_driver = {
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.name = "cpc_cpuidle",
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.owner = THIS_MODULE,
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.states = {
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[STATE_WAIT] = MIPS_CPUIDLE_WAIT_STATE,
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[STATE_NC_WAIT] = {
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.enter = cps_nc_enter,
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.exit_latency = 200,
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.target_residency = 450,
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.name = "nc-wait",
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.desc = "non-coherent MIPS wait",
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},
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[STATE_CLOCK_GATED] = {
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.enter = cps_nc_enter,
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.exit_latency = 300,
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.target_residency = 700,
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.flags = CPUIDLE_FLAG_TIMER_STOP,
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.name = "clock-gated",
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.desc = "core clock gated",
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},
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[STATE_POWER_GATED] = {
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.enter = cps_nc_enter,
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.exit_latency = 600,
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.target_residency = 1000,
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.flags = CPUIDLE_FLAG_TIMER_STOP,
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.name = "power-gated",
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.desc = "core power gated",
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},
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},
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.state_count = STATE_COUNT,
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.safe_state_index = 0,
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};
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static void __init cps_cpuidle_unregister(void)
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{
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int cpu;
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struct cpuidle_device *device;
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for_each_possible_cpu(cpu) {
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device = &per_cpu(cpuidle_dev, cpu);
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cpuidle_unregister_device(device);
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}
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cpuidle_unregister_driver(&cps_driver);
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}
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static int __init cps_cpuidle_init(void)
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{
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int err, cpu, i;
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struct cpuidle_device *device;
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/* Detect supported states */
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if (!cps_pm_support_state(CPS_PM_POWER_GATED))
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cps_driver.state_count = STATE_CLOCK_GATED + 1;
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if (!cps_pm_support_state(CPS_PM_CLOCK_GATED))
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cps_driver.state_count = STATE_NC_WAIT + 1;
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if (!cps_pm_support_state(CPS_PM_NC_WAIT))
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cps_driver.state_count = STATE_WAIT + 1;
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/* Inform the user if some states are unavailable */
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if (cps_driver.state_count < STATE_COUNT) {
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pr_info("cpuidle-cps: limited to ");
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switch (cps_driver.state_count - 1) {
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case STATE_WAIT:
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pr_cont("coherent wait\n");
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break;
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case STATE_NC_WAIT:
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pr_cont("non-coherent wait\n");
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break;
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case STATE_CLOCK_GATED:
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pr_cont("clock gating\n");
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break;
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}
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}
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/*
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* Set the coupled flag on the appropriate states if this system
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* requires it.
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*/
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if (coupled_coherence)
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for (i = STATE_NC_WAIT; i < cps_driver.state_count; i++)
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cps_driver.states[i].flags |= CPUIDLE_FLAG_COUPLED;
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err = cpuidle_register_driver(&cps_driver);
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if (err) {
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pr_err("Failed to register CPS cpuidle driver\n");
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return err;
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}
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for_each_possible_cpu(cpu) {
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device = &per_cpu(cpuidle_dev, cpu);
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device->cpu = cpu;
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#ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED
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cpumask_copy(&device->coupled_cpus, &cpu_sibling_map[cpu]);
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#endif
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err = cpuidle_register_device(device);
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if (err) {
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pr_err("Failed to register CPU%d cpuidle device\n",
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cpu);
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goto err_out;
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}
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}
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return 0;
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err_out:
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cps_cpuidle_unregister();
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return err;
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}
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device_initcall(cps_cpuidle_init);
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