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![Dave Gordon](/assets/img/avatar_default.png)
In various places, a single page of a (regular) GEM object is mapped into CPU address space and updated. In each such case, either the page or the the object should be marked dirty, to ensure that the modifications are not discarded if the object is evicted under memory pressure. The typical sequence is: va = kmap_atomic(i915_gem_object_get_page(obj, pageno)); *(va+offset) = ... kunmap_atomic(va); Here we introduce i915_gem_object_get_dirty_page(), which performs the same operation as i915_gem_object_get_page() but with the side-effect of marking the returned page dirty in the pagecache. This will ensure that if the object is subsequently evicted (due to memory pressure), the changes are written to backing store rather than discarded. Note that it works only for regular (shmfs-backed) GEM objects, but (at least for now) those are the only ones that are updated in this way -- the objects in question are contexts and batchbuffers, which are always shmfs-backed. Separate patches deal with the cases where whole objects are (or may be) dirtied. v3: Mark two more pages dirty in the page-boundary-crossing cases of the execbuffer relocation code [Chris Wilson] Signed-off-by: Dave Gordon <david.s.gordon@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Link: http://patchwork.freedesktop.org/patch/msgid/1449773486-30822-2-git-send-email-david.s.gordon@intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
229 lines
5.3 KiB
C
229 lines
5.3 KiB
C
/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Mika Kuoppala <mika.kuoppala@intel.com>
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*
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*/
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#include "i915_drv.h"
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#include "intel_renderstate.h"
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static const struct intel_renderstate_rodata *
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render_state_get_rodata(struct drm_device *dev, const int gen)
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{
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switch (gen) {
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case 6:
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return &gen6_null_state;
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case 7:
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return &gen7_null_state;
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case 8:
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return &gen8_null_state;
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case 9:
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return &gen9_null_state;
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}
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return NULL;
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}
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static int render_state_init(struct render_state *so, struct drm_device *dev)
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{
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int ret;
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so->gen = INTEL_INFO(dev)->gen;
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so->rodata = render_state_get_rodata(dev, so->gen);
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if (so->rodata == NULL)
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return 0;
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if (so->rodata->batch_items * 4 > 4096)
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return -EINVAL;
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so->obj = i915_gem_alloc_object(dev, 4096);
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if (so->obj == NULL)
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return -ENOMEM;
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ret = i915_gem_obj_ggtt_pin(so->obj, 4096, 0);
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if (ret)
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goto free_gem;
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so->ggtt_offset = i915_gem_obj_ggtt_offset(so->obj);
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return 0;
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free_gem:
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drm_gem_object_unreference(&so->obj->base);
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return ret;
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}
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/*
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* Macro to add commands to auxiliary batch.
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* This macro only checks for page overflow before inserting the commands,
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* this is sufficient as the null state generator makes the final batch
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* with two passes to build command and state separately. At this point
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* the size of both are known and it compacts them by relocating the state
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* right after the commands taking care of aligment so we should sufficient
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* space below them for adding new commands.
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*/
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#define OUT_BATCH(batch, i, val) \
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do { \
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if (WARN_ON((i) >= PAGE_SIZE / sizeof(u32))) { \
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ret = -ENOSPC; \
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goto err_out; \
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} \
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(batch)[(i)++] = (val); \
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} while(0)
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static int render_state_setup(struct render_state *so)
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{
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const struct intel_renderstate_rodata *rodata = so->rodata;
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unsigned int i = 0, reloc_index = 0;
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struct page *page;
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u32 *d;
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int ret;
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ret = i915_gem_object_set_to_cpu_domain(so->obj, true);
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if (ret)
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return ret;
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page = i915_gem_object_get_dirty_page(so->obj, 0);
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d = kmap(page);
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while (i < rodata->batch_items) {
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u32 s = rodata->batch[i];
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if (i * 4 == rodata->reloc[reloc_index]) {
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u64 r = s + so->ggtt_offset;
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s = lower_32_bits(r);
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if (so->gen >= 8) {
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if (i + 1 >= rodata->batch_items ||
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rodata->batch[i + 1] != 0) {
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ret = -EINVAL;
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goto err_out;
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}
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d[i++] = s;
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s = upper_32_bits(r);
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}
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reloc_index++;
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}
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d[i++] = s;
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}
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while (i % CACHELINE_DWORDS)
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OUT_BATCH(d, i, MI_NOOP);
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so->aux_batch_offset = i * sizeof(u32);
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OUT_BATCH(d, i, MI_BATCH_BUFFER_END);
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so->aux_batch_size = (i * sizeof(u32)) - so->aux_batch_offset;
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/*
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* Since we are sending length, we need to strictly conform to
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* all requirements. For Gen2 this must be a multiple of 8.
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*/
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so->aux_batch_size = ALIGN(so->aux_batch_size, 8);
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kunmap(page);
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ret = i915_gem_object_set_to_gtt_domain(so->obj, false);
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if (ret)
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return ret;
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if (rodata->reloc[reloc_index] != -1) {
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DRM_ERROR("only %d relocs resolved\n", reloc_index);
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return -EINVAL;
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}
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return 0;
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err_out:
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kunmap(page);
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return ret;
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}
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#undef OUT_BATCH
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void i915_gem_render_state_fini(struct render_state *so)
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{
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i915_gem_object_ggtt_unpin(so->obj);
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drm_gem_object_unreference(&so->obj->base);
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}
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int i915_gem_render_state_prepare(struct intel_engine_cs *ring,
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struct render_state *so)
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{
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int ret;
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if (WARN_ON(ring->id != RCS))
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return -ENOENT;
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ret = render_state_init(so, ring->dev);
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if (ret)
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return ret;
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if (so->rodata == NULL)
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return 0;
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ret = render_state_setup(so);
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if (ret) {
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i915_gem_render_state_fini(so);
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return ret;
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}
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return 0;
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}
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int i915_gem_render_state_init(struct drm_i915_gem_request *req)
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{
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struct render_state so;
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int ret;
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ret = i915_gem_render_state_prepare(req->ring, &so);
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if (ret)
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return ret;
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if (so.rodata == NULL)
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return 0;
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ret = req->ring->dispatch_execbuffer(req, so.ggtt_offset,
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so.rodata->batch_items * 4,
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I915_DISPATCH_SECURE);
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if (ret)
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goto out;
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if (so.aux_batch_size > 8) {
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ret = req->ring->dispatch_execbuffer(req,
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(so.ggtt_offset +
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so.aux_batch_offset),
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so.aux_batch_size,
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I915_DISPATCH_SECURE);
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if (ret)
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goto out;
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}
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i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req);
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out:
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i915_gem_render_state_fini(&so);
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return ret;
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}
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